- Jul 17, 2012
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Wesley W. Terpstra authored
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- Jun 04, 2012
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Wesley W. Terpstra authored
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- May 09, 2012
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Wesley W. Terpstra authored
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- May 07, 2012
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Wesley W. Terpstra authored
This would break the read (non-posted) and write (posted) ordering that Wishbone depends on.
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- May 04, 2012
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Wesley W. Terpstra authored
Currently hardcode SDWB address as hardware does not support it.
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Wesley W. Terpstra authored
Fixed bugs in kernel etherbone: record_len was shadowed by redeclation wrote maximum of possible bytes instead of minimum added non-blocking IO support
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Wesley W. Terpstra authored
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Wesley W. Terpstra authored
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- Apr 17, 2012
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Wesley W. Terpstra authored
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