Commits · a415b3d9253db7ccb4b60bc3bc9bb003264b8f75 · Projects / FPGA Configuration Space · GitLab

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May 07, 2012
- PCI express allows posted operations to cut-in-line versus non-posted operations. · a415b3d9
  Wesley W. Terpstra authored 12 years ago
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This would break the read (non-posted) and write (posted) ordering that Wishbone depends on.
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  a415b3d9
May 04, 2012
- Implement the mandatory Etherbone config space registers. · c9973e18
  Wesley W. Terpstra authored 12 years ago
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Currently hardcode SDWB address as hardware does not support it.
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  c9973e18
- Added optional debug printk tracking of IO to the WB bridge · 5303eb90
  Wesley W. Terpstra authored 12 years ago
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Fixed bugs in kernel etherbone:
  record_len was shadowed by redeclation
  wrote maximum of possible bytes instead of minimum
  added non-blocking IO support
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  5303eb90
- Implement streaming Etherbone · bf61db73
  Wesley W. Terpstra authored 12 years ago
  
  bf61db73
- Rewrote driver! · 3e3feba1
  Wesley W. Terpstra authored 12 years ago
  
  3e3feba1
Apr 17, 2012
- Much hacking to remove baggage from the old driver · 786c393f
  Wesley W. Terpstra authored 12 years ago
  
  786c393f