Commits · 937b2a9cb2476d0c015d2a66173bd1945ba8274b · Projects / FPGA Configuration Space · GitLab

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Apr 23, 2012
- Insert padding needed to align Altera-specific TLP format · 937b2a9c
  Wesley W. Terpstra authored 12 years ago
  
  937b2a9c
- Decode the BAR and pass it with outgoing wishbone requests · 9c2823b5
  Wesley W. Terpstra authored 12 years ago
  
  9c2823b5
Apr 18, 2012
- Working read state machine. · b9b7f665
  Wesley W. Terpstra authored 12 years ago
```
Bug: std_match is needed when comparing '-'s
```
  b9b7f665
- TX path synthesizes! · bc75b8b2
  Wesley W. Terpstra authored 12 years ago
  
  bc75b8b2
Apr 17, 2012
- TX path added to altera pcie wrapper · de5697d7
  Wesley W. Terpstra authored 12 years ago
```
stub wishbone device added for testing
```
  de5697d7
Apr 13, 2012
- Strobe needs to be cut-through if data is. · 56b99dd0
  Wesley W. Terpstra authored 12 years ago
  
  56b99dd0
- working wishbone output! · 8feb4fc7
  Wesley W. Terpstra authored 12 years ago
  
  8feb4fc7