- Address should be set using DIP switches (as is currently specified).
- Produced variable size should be routed to the FMC connector and set
by another FPGA. A default value should be set by weak (i.e. high
resistance) pull-up or pull-down resistors (unless integrated already in
the nanoFIP IC) as suggested by Dimitris.
- Constructor & Model ID could be routed to FMC or set by resistors/DIP
I have already counted the FMC pins and signals and we cannot afford to
reserve so many pins for this configuration. The current users do not
care about the setting, but it should be a way to change it, just in
A default value should be set by high value pull-up or pull-down
resistors (unless integrated already in the nanoFIP IC).
If need be, one can have for example the most significant bits by fixed
resistors and the as many as possible of the least significant bits
routed to the FMC connector (with weak pull-up or pull-down).
- LEDs should indicate nanoFIP link activity (connected to FielDrive's
carrier detected pin) and Wishbone activity (CYC_O connected
torad-tolerant one-shot to extend the pulse length).
- Create a more detailed 3D mock-up to see if all components will fit
on the board. Be sure that FieldTR is placed in the cut out zone.