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AIDA-2020 TLU
Commit 34836896 authored by Alvaro Dosil's avatar Alvaro Dosil
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update setup project files

parent 43b1584c
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firmware/config/ise14/sp601/setup_project.tcl
View file @ 34836896
......@@ -127,6 +127,10 @@ xfile add fmc-mtlu/firmware/hdl/common/arrivalTimeLUT_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/test/clock_divider_s6.v
xfile add fmc-mtlu/firmware/hdl/common/counterWithReset_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/synchronizeRegisters_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/handshakes_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/TPx3Logic_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/GPP_rtl.vhd
# Then add the HDL-Designer generated files..
xfile add fmc-mtlu/firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/top_extphy_struct.vhd
......
firmware/config/ise14/sp605/setup_project.tcl
View file @ 34836896
......@@ -126,6 +126,10 @@ xfile add fmc-mtlu/firmware/hdl/common/arrivalTimeLUT_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/test/clock_divider_s6.v
xfile add fmc-mtlu/firmware/hdl/common/counterWithReset_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/synchronizeRegisters_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/handshakes_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/TPx3Logic_rtl.vhd
xfile add fmc-mtlu/firmware/hdl/common/GPP_rtl.vhd
# Then add the HDL-Designer generated files..
xfile add fmc-mtlu/firmware/hdl_designer/fmc_mTLU/fmc_mTLU_lib/hdl/top_extphy_struct.vhd
......
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