Merging

TLU_v1e/hdl/dut/DUTInterfaces_rtl.vhd

@@ -114,11 +114,15 @@ ARCHITECTURE rtl OF DUTInterfaces IS
 
   signal s_DUT_interface_mode_modifier : std_logic_vector((2*g_NUM_DUTS)-1 downto 0) := (others => '1');  
   signal s_IgnoreShutterVeto : std_logic := '0';  -- --! When high the shutter won't veto triggers when low.
+  
+  signal s_SPILL_delay : std_logic_vector(31 downto 0) := (others => '0');
+  signal s_SPILL_wait : std_logic_vector(31 downto 0) := (others => '0');
+  signal s_SPILL_width : std_logic_vector(31 downto 0) := (others => '0');
 
   
   -- Signal for IPBus
-  constant c_N_CTRL : positive := 8;
-  constant c_N_STAT : positive := 8;
+  constant c_N_CTRL : positive := 9;
+  constant c_N_STAT : positive := 9;
   signal s_status_to_ipbus, s_sync_status_to_ipbus : ipb_reg_v(c_N_STAT-1 downto 0);
   signal s_control_from_ipbus,s_sync_control_from_ipbus : ipb_reg_v(c_N_CTRL-1 downto 0);
                                                                
@@ -170,6 +174,7 @@ BEGIN
   s_DUT_interface_mode          <= s_sync_control_from_ipbus(3)((2*g_NUM_DUTS)-1 downto 0);
   s_DUT_interface_mode_modifier <= s_sync_control_from_ipbus(4)((2*g_NUM_DUTS)-1 downto 0);
   
+  
     -- Map the status registers
   s_status_to_ipbus(0) <= std_logic_vector(to_unsigned(0,g_IPBUS_WIDTH-g_NUM_DUTS)) & s_DUT_mask;
   s_status_to_ipbus(1) <= std_logic_vector(to_unsigned(0,g_IPBUS_WIDTH-g_NUM_DUTS)) & s_DUT_ignore_busy;

TLU_v1e/scripts/TLU_v1e.py

@@ -42,7 +42,7 @@ class TLU:
         self.VrefExt= parsed_cfg.getfloat(section_name, "VRefExt")
 
         #self.intRefOn= False #Internal reference is OFF by default
-        self.intRefOn= bool(parsed_cfg.get(section_name, "intRefOn"))
+        self.intRefOn= int(parsed_cfg.get(section_name, "intRefOn"))
 
 
         self.fwVersion = self.hw.getNode("version").read()
@@ -84,11 +84,11 @@ class TLU:
         self.IC6=PCA9539PW(self.TLU_I2C, exp1_addr)
         self.IC6.setInvertReg(0, 0x00)# 0= normal, 1= inverted
         self.IC6.setIOReg(0, 0x00)# 0= output, 1= input
-        self.IC6.setOutputs(0, 0x77)# If output, set to XX
+        self.IC6.setOutputs(0, 0xFF)# If output, set to XX
 
         self.IC6.setInvertReg(1, 0x00)# 0= normal, 1= inverted
         self.IC6.setIOReg(1, 0x00)# 0= output, 1= input
-        self.IC6.setOutputs(1, 0x77)# If output, set to XX
+        self.IC6.setOutputs(1, 0xFF)# If output, set to XX
 
         #self.IC7=PCA9539PW(self.TLU_I2C, 0x75)
         exp2_addr= int(parsed_cfg.get(section_name, "I2C_EXP2_Addr"), 16)
@@ -119,13 +119,13 @@ class TLU:
         print "  Setting DUT:", dutN, "to", enable
         if (verbose > 1):
             print "\tBank", bank, "Nibble", nibble
-        res= self.IC6.getIOReg(bank)
+        res= self.IC6.getOutputs(bank)
         oldStatus= res[0]
         mask= 0xF << 4*nibble
         newStatus= oldStatus & (~mask)
         if (not enable): # we want to write 0 to activate the outputs so check opposite of "enable"
             newStatus |= mask
-        self.IC6.setIOReg(bank, newStatus)
+        self.IC6.setOutputs(bank, newStatus)
 
         if verbose:
             print "\tOldStatus= ", "{0:#0{1}x}".format(oldStatus,4), "Mask=" , hex(mask), "newStatus=", "{0:#0{1}x}".format(newStatus,4)
@@ -145,13 +145,13 @@ class TLU:
         print "  Setting DUT:", dutN, "pins status to", hex(enable)
         if (verbose > 1):
             print "\tBank", bank, "Nibble", nibble
-        res= self.IC6.getIOReg(bank)
+        res= self.IC6.getOutputs(bank)
         oldStatus= res[0]
         mask= 0xF << 4*nibble
         newnibble= (enable & 0xF) << 4*nibble # bits we want to change are marked with 1
         newStatus= (oldStatus & (~mask)) | (newnibble & mask)
 
-        self.IC6.setIOReg(bank, newStatus)
+        self.IC6.setOutputs(bank, newStatus)
 
         if (verbose > 0):
             self.getDUTOutpus(dutN, verbose)
@@ -175,7 +175,7 @@ class TLU:
         maskLow= 1 << (1* dutN) #CLK FROM FPGA
         maskHigh= 1<< (1* dutN +4) #CLK FROM Si5345
         mask= maskLow | maskHigh
-        res= self.IC7.getIOReg(bank)
+        res= self.IC7.getOutputs(bank)
         oldStatus= res[0]
         newStatus= oldStatus & ~mask #set both bits to zero
         outStat= ""
@@ -191,7 +191,7 @@ class TLU:
         print "  Setting DUT:", dutN, "clock source to", outStat
         if (verbose > 1):
             print "\tOldStatus= ", "{0:#0{1}x}".format(oldStatus,4), "Mask=" , hex(mask), "newStatus=", "{0:#0{1}x}".format(newStatus,4)
-        self.IC7.setIOReg(bank, newStatus)
+        self.IC7.setOutputs(bank, newStatus)
         return newStatus
 
     def enableClkLEMO(self, enable= False, verbose= False):
@@ -233,7 +233,7 @@ class TLU:
             return -1
         bank= dutN//2 # DUT0 and DUT1 are on bank 0. DUT2 and DUT3 on bank 1
         nibble= dutN%2 # DUT0 and DUT2 are on nibble 0. DUT1 and DUT3 are on nibble 1
-        res= self.IC6.getIOReg(bank)
+        res= self.IC6.getOutputs(bank)
         dut_status= res[0]
         dut_lines= ["CONT", "SPARE", "TRIG", "BUSY"]
         dut_status= 0x0F & (dut_status >> (4*nibble))

TLU_v1e/scripts/localIni.ini

 [Producer.fmctlu]
 initid= 20170703
-verbose = 0
+verbose = 1
 ConnectionFile= "file://./../user/eudet/misc/fmctlu_connection.xml"
 DeviceName="fmctlu.udp"
 TLUmod= "1e"

TLU_v1e/scripts/startTLU_v1e.py

@@ -51,7 +51,7 @@ class MyPrompt(cmd.Cmd):
         (without quotation marks)"""
     	print "==== COMMAND RECEIVED: PARSE CONFIG"
     	#self.testme()
-        parsed_cfg= self.open_cfg_file(args, "/users/phpgb/workspace/myFirmware/AIDA/TLU_v1e/scripts/localConf.conf")
+        parsed_cfg= self.open_cfg_file(args, "./localConf.conf")
         try:
             theID = parsed_cfg.getint("Producer.fmctlu", "confid")
             print "\t", theID
@@ -69,10 +69,11 @@ class MyPrompt(cmd.Cmd):
         """Interrogates the TLU and prints the number of triggers seen by the input discriminators"""
         TLU.getChStatus()
         TLU.getAllChannelsCounts()
+        TLU.getPostVetoTrg()
         return
 
     def do_startRun(self, args):
-        """Starts the TLU run"""
+        """Starts the TLU run. If a number is specified, this number will be appended to the file name as Run_#"""
     	print "==== COMMAND RECEIVED: STARTING TLU RUN"
     	#startTLU( uhalDevice = self.hw, pychipsBoard = self.board,  writeTimestamps = ( options.writeTimestamps == "True" ) )
         arglist = args.split()
@@ -152,7 +153,12 @@ class MyPrompt(cmd.Cmd):
     def do_quit(self, args):
         """Quits the program."""
         print "==== COMMAND RECEIVED: QUITTING TLU CONSOLE"
-        #raise SystemExit
+        if TLU.isRunning:
+            TLU.isRunning= False
+            TLU.stop(False, False)
+            self.root_file.Write()
+            self.root_file.Close()
+            print "Terminating run"
 	return True
 
     def testme(self):

packages/PCA9539PW.py

@@ -84,3 +84,11 @@ class PCA9539PW:
             return
         values = values & 0xFF
         self.writeReg(bank+2, values)
+
+    def getOutputs(self, bank):
+        #Read the state of the outputs (i.e. what value is being written to them)
+        if (bank < 0) | (bank > 1):
+            print "PCA9539PW - ERROR: bank should be 0 or 1"
+            return
+        res= self.readReg(bank+2, 1)
+        return res