Checking in edited schematic for clock generator (8d443a3f) · Commits · Projects / AIDA-2020 TLU

Commit 8d443a3f authored 8 years ago by

David Cussans

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Checking in edited schematic for clock generator

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circuit_board/Cadence/adw/shoppingCart.xml 5 additions, 0 deletions

circuit_board/Cadence/adw/shoppingCart.xml
circuit_board/Cadence/fmc_tlu_clock_gen.cpm 2 additions, 3 deletions

circuit_board/Cadence/fmc_tlu_clock_gen.cpm
circuit_board/Cadence/fmc_tlu_threshold_discriminator_dual.cpm 2 additions, 2 deletions

...it_board/Cadence/fmc_tlu_threshold_discriminator_dual.cpm
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstback.dat 40 additions, 4 deletions

...rd/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstback.dat
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstback.dat,1 24 additions, 15 deletions

.../Cadence/worklib/fmc_tlu_clock_gen/packaged/pstback.dat,1
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstback.dat,2 1 addition, 15 deletions

.../Cadence/worklib/fmc_tlu_clock_gen/packaged/pstback.dat,2
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstback.dat,3 1 addition, 1 deletion

.../Cadence/worklib/fmc_tlu_clock_gen/packaged/pstback.dat,3
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstchip.dat 44 additions, 1 deletion

...rd/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstchip.dat
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstchip.dat,1 41 additions, 1 deletion

.../Cadence/worklib/fmc_tlu_clock_gen/packaged/pstchip.dat,1
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstchip.dat,2 1 addition, 1 deletion

.../Cadence/worklib/fmc_tlu_clock_gen/packaged/pstchip.dat,2
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstchip.dat,3 1 addition, 1 deletion

.../Cadence/worklib/fmc_tlu_clock_gen/packaged/pstchip.dat,3
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstcmdb.dat 111 additions, 3 deletions

...rd/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstcmdb.dat
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstpin.dat 6 additions, 2 deletions

...ard/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstpin.dat
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstpin.dat,1 6 additions, 2 deletions

...d/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstpin.dat,1
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstpin.dat,2 2 additions, 2 deletions

...d/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstpin.dat,2
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstpin.dat,3 2 additions, 2 deletions

...d/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstpin.dat,3
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstrprt.dat 5 additions, 4 deletions

...rd/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstrprt.dat
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstrprt.dat,1 5 additions, 4 deletions

.../Cadence/worklib/fmc_tlu_clock_gen/packaged/pstrprt.dat,1
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstrprt.dat,2 5 additions, 3 deletions

.../Cadence/worklib/fmc_tlu_clock_gen/packaged/pstrprt.dat,2
circuit_board/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstxnet.dat 79 additions, 7 deletions

...rd/Cadence/worklib/fmc_tlu_clock_gen/packaged/pstxnet.dat

with 383 additions and 73 deletions

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