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FMC DIO 5ch TTL a
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FMC DIO 5ch TTL a
Commits
743d7690
Commit
743d7690
authored
Aug 01, 2012
by
Javier Díaz
Committed by
Miguel Jimenez Lopez
Apr 03, 2019
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Plain Diff
fecthing sources from switch hdl project
parent
a78517b2
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-2
immed_pulse_counter.vhd
modules/wrsw_dio/immed_pulse_counter.vhd
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modules/wrsw_dio/immed_pulse_counter.vhd
View file @
743d7690
...
...
@@ -62,7 +62,7 @@ architecture rtl of immed_pulse_counter is
-- Signal for synchronization (in fact they are not so necessary for current system...)
signal
pulse_start_d0
,
pulse_start_d1
,
pulse_start_d2
,
pulse_start_d3
:
std_logic
;
signal
nozerolength
:
boolean
;
signal
nozerolength
,
nozerolength_aux
:
boolean
;
-- Aux
constant
zeros
:
std_logic_vector
(
pulse_length_width
-1
downto
0
)
:
=
(
others
=>
'0'
);
...
...
@@ -83,8 +83,9 @@ begin -- architecture rtl
pulse_start_d1
<=
pulse_start_d0
;
pulse_start_d2
<=
pulse_start_d1
;
pulse_start_d3
<=
pulse_start_d2
;
nozerolength_aux
<=
pulse_length_i
/=
zeros
;
if
(
pulse_start_d2
=
'1'
and
pulse_start_d1
=
'0'
)
then
nozerolength
<=
pulse_length_i
/=
zeros
;
nozerolength
<=
nozerolength_aux
;
end
if
;
end
if
;
end
process
;
...
...
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