Skip to content

F
fmc dac 600m 12b 1cha dds - Testing
Commit 758e7e4f authored by Marek Gumiński's avatar Marek Gumiński
Browse files
Options

Increased a time the PTS is waiting for AD9516 lock. 

On some boards it took a little more than the previous limit.
parent 18a23f46
Hide whitespace changes
Inline Side-by-side
Showing with 4 additions and 2 deletions
python/ad9516.py
View file @ 758e7e4f
...@@ -6,6 +6,7 @@ import time ...@@ -6,6 +6,7 @@ import time
import math import math
import os import os
import signal import signal
import time
from ctypes import * from ctypes import *
from ptsexcept import * from ptsexcept import *
...@@ -45,9 +46,10 @@ class ad9516: ...@@ -45,9 +46,10 @@ class ad9516:
raise PtsCritical("AD9516: reference frequency lower then 1 MHz! OSC1/OSC2 or their connections to AD9516 might be broken.") raise PtsCritical("AD9516: reference frequency lower then 1 MHz! OSC1/OSC2 or their connections to AD9516 might be broken.")
def check_lock(self): def check_lock(self):
for i in range(10): for i in range(50):
time.sleep(0.5)
if(self.read_reg( 0x1f) & (1 << 0)): if(self.read_reg( 0x1f) & (1 << 0)):
print "AD9516 PLL locked" print "AD9516 PLL locked after: " + str((i+1)*0.5) + "s"
break break
else: else:
raise PtsCritical("AD9516 PLL did NOT lock. This might be caused by placing wrong OSC1/OSC2 oscillator.") raise PtsCritical("AD9516 PLL did NOT lock. This might be caused by placing wrong OSC1/OSC2 oscillator.")
......
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment