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FMC DAC 600M 12b 1cha DDS
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FMC DAC 600M 12b 1cha DDS
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Home
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· Changes
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Update Home
authored
5 years ago
by
Marek Gumiński
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@@ -36,11 +36,8 @@ use](https://www.ohwr.org/project/fmc-dac-600m-12b-1cha-dds/uploads/9a7b66f98f15
-
Fine-delay adjusted RF synchronous trigger output (LVTTL)
-
14-bit 600MHz DAC (MAX5890EGK+D) with splitter and amplifier
-
ADF4002 phase detector + programmable LPF + 16-bit ADC
-
AD9510 PLL with external oscillator for jitter cleaning of the
synthesized RF signal
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AD9516 PLL for jitter cleaning of the synthesized RF signal
-
Clocking resources
-
1x user-specified frequency VCTCXO controlled by the AD9510 PLL
for low additional jitter cleaning
-
1x 25 MHz TCXO controlled by a DAC with SPI interface (AD5662,
used by
[
White Rabbit PTP
core
](
https://www.ohwr.org/wr-cores/wikis/Wrpc-core
)
)
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@@ -49,10 +46,10 @@ use](https://www.ohwr.org/project/fmc-dac-600m-12b-1cha-dds/uploads/9a7b66f98f15
adjustment by SY89295
-
Miscellaneous
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On-board thermometer IC (DS18B20U+)
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64kbit EEPROM (24AA64T-I/MC) connected for storing appli
cation
parameters
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Two MCP9801 thermometer IC's mounted in heat critical lo
cation
s
-
2kbit EEPROM (M24C02) connected for storing application
parameters
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2 LEDs
-
4
-layer PCB
-
6
-layer PCB
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