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FMC ADC 100M 14b 4cha - Gateware
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  • FMC ADC 100M 14b 4cha - Gateware
  • Issues

  • Open 7
  • Closed 20
  • All 27
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  • Priority Created date Last updated Milestone Due date Popularity Label priority
  • Simulation: add ADC functional model
    #38 · opened Aug 05, 2019 by Dimitris Lampridis   feature
    • 1
    updated Aug 05, 2019
  • Generalize timetag core and move to general-cores
    #6 · opened Jan 23, 2018 by Dimitris Lampridis   feature
    • CLOSED
    • 1
    updated Aug 05, 2019
  • Update testbench
    #7 · opened Jan 23, 2018 by Dimitris Lampridis   V5.0 gateware release   feature
    • CLOSED
    • 1
    updated Aug 05, 2019
  • Replace hardware trigger enable logic
    #8 · opened Jan 23, 2018 by Dimitris Lampridis   V5.0 gateware release   feature
    • CLOSED
    • 1
    updated Aug 05, 2019
  • hdl - switch to 125MHz clock source
    #10 · opened May 13, 2016 by Dimitris Lampridis   V5.0 gateware release   feature
    • CLOSED
    • 0
    updated Aug 05, 2019
  • Discipline the ADC sampling clock with WR
    #11 · opened Apr 28, 2016 by Dimitris Lampridis   feature
    • 1
    updated Aug 05, 2019
  • Implement a basic WR trigger message
    #12 · opened Apr 28, 2016 by Dimitris Lampridis   V5.0 gateware release   feature
    • CLOSED
    • 1
    updated Aug 05, 2019
  • Add extra trigger input from FPGA logic
    #13 · opened Apr 28, 2016 by Dimitris Lampridis   V5.0 gateware release   feature
    • CLOSED
    • 1
    updated Aug 05, 2019
  • Add option to tag based on WR time
    #14 · opened Apr 28, 2016 by Dimitris Lampridis   V5.0 gateware release   feature
    • CLOSED
    • 1
    updated Aug 05, 2019
  • Add "trigger on time" functionality
    #15 · opened Apr 28, 2016 by Dimitris Lampridis   V5.0 gateware release   feature
    • CLOSED
    • 1
    updated Aug 05, 2019
  • Clean up and update simulations and testbenches
    #17 · opened Apr 19, 2016 by Dimitris Lampridis   feature
    • CLOSED
    • 0
    updated Feb 12, 2019
  • Clean up and update build process
    #18 · opened Apr 19, 2016 by Dimitris Lampridis   feature
    • CLOSED
    • 0
    updated Feb 12, 2019
  • Use 200MHz clock for WB bus from ddr-ctrl to gn4124-core
    #19 · opened Apr 18, 2016 by Dimitris Lampridis   feature
    • CLOSED
    • 2
    updated Aug 05, 2019
  • Same addressing mode in all interfaces
    #20 · opened Apr 18, 2016 by Dimitris Lampridis   feature
    • CLOSED
    • 3
    updated Aug 05, 2019
  • Expose more info in the status and/or interrupt registers
    #21 · opened Apr 18, 2016 by Dimitris Lampridis   V5.0 gateware release   feature
    • 1
    updated Aug 05, 2019
  • Account for trigger sample in post-trigger samples
    #23 · opened Apr 18, 2016 by Dimitris Lampridis   V5.0 gateware release   feature
    • 2
    updated Aug 05, 2019
  • Implement trigger hold-off in multi-shot mode
    #24 · opened Apr 18, 2016 by Dimitris Lampridis   feature
    • 1
    updated Aug 05, 2019
  • Replace "decimation" with "under-sampling"
    #25 · opened Apr 18, 2016 by Dimitris Lampridis   V5.0 gateware release   feature
    • CLOSED
    • 1
    updated Aug 05, 2019
  • Add White Rabbit support
    #26 · opened Apr 18, 2016 by Dimitris Lampridis   V5.0 gateware release   feature
    • CLOSED
    • 2
    updated Aug 05, 2019
  • Stream directly to DDR in multi-shot mode
    #27 · opened Apr 18, 2016 by Dimitris Lampridis   feature
    • 1
    updated Aug 05, 2019
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