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FMC ADC 100M 14b 4cha - Gateware
Commit d6bd022b authored by Dimitris Lampridis's avatar Dimitris Lampridis
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hdl: help SPEC150T to meet timing 

Signed-off-by: Dimitris Lampridis's avatarDimitris Lampridis <dimitris.lampridis@cern.ch>
parent 30b96948
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hdl/syn/spec150_ref_design_wr/spec_ref_fmc_adc_100Ms_wr.ucf
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......@@ -144,3 +144,6 @@ TIMEGRP "adc_sync_reg" = "sync_reg" EXCEPT "fs_clk";
TIMESPEC TS_adc_sync_reg = FROM fs_clk TO "adc_sync_reg" 10ns DATAPATHONLY;
TIMESPEC TS_adc_sync_word = FROM sync_word TO fs_clk 30ns DATAPATHONLY;
INST "inst_spec_base/gen_with_ddr.cmp_ddr_ctrl_bank3/cmp_ddr3_ctrl_wb_0/cmp_cmd_fifo/U_Inferred_FIFO/U_FIFO_Ram/gen_single_clk.U_RAM_SC/Mram_ram1" LOC=RAMB16_X0Y44:RAMB16_X0Y54;
INST "inst_spec_base/gen_with_ddr.cmp_ddr_ctrl_bank3/cmp_ddr3_ctrl_wb_0/cmp_wr_fifo/U_Inferred_FIFO/U_FIFO_Ram/gen_single_clk.U_RAM_SC/Mram_ram1" LOC=RAMB16_X0Y44:RAMB16_X0Y54;
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