FASEC_hwtest IP updated for DAC SPI & FASEC DIO; xdc update for IOs and timing constraints (2ce3a59e) · Commits · Projects / FPGA and ARM SoC FMC Carrier FASEC

Commit 2ce3a59e authored 8 years ago by

Pieter Van Trappen

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FASEC_hwtest IP updated for DAC SPI & FASEC DIO; xdc update for IOs and timing constraints

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FASEC_prototype.ip_user_files/bd/system_design/hdl/system_design.vhd 129 additions, 87 deletions

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FASEC_prototype.ip_user_files/bd/system_design/ip/system_design_axi_wb_i2c_master_0_0/sim/system_design_axi_wb_i2c_master_0_0.vhd 1 addition, 1 deletion

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FASEC_prototype.ip_user_files/bd/system_design/ip/system_design_axi_wb_i2c_master_1_0/sim/system_design_axi_wb_i2c_master_1_0.vhd 1 addition, 1 deletion

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FASEC_prototype.ip_user_files/bd/system_design/ip/system_design_axi_wb_i2c_master_2_0/sim/system_design_axi_wb_i2c_master_2_0.vhd 1 addition, 1 deletion

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FASEC_prototype.ip_user_files/bd/system_design/ip/system_design_fasec_hwtest_0_0/sim/system_design_fasec_hwtest_0_0.vhd 33 additions, 4 deletions

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FASEC_prototype.ip_user_files/bd/system_design/ip/system_design_gig_ethernet_pcs_pma_0_0/synth/sgmii_adapt/system_design_gig_ethernet_pcs_pma_0_0_johnson_cntr.vhd 0 additions, 135 deletions

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FASEC_prototype.ip_user_files/bd/system_design/ip/system_design_gig_ethernet_pcs_pma_0_0/synth/sgmii_adapt/system_design_gig_ethernet_pcs_pma_0_0_sgmii_adapt.vhd 0 additions, 350 deletions

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FASEC_prototype.ip_user_files/bd/system_design/ip/system_design_gig_ethernet_pcs_pma_0_0/synth/transceiver/system_design_gig_ethernet_pcs_pma_0_0_rx_elastic_buffer.vhd 0 additions, 832 deletions

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FASEC_prototype.ip_user_files/bd/system_design/ipshared/user.org/axi_wb_i2c_master_v2_5_1/src/axis_to_i2c_wbs_v1_0.vhd 0 additions, 0 deletions

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FASEC_prototype.ip_user_files/bd/system_design/ipshared/user.org/axi_wb_i2c_master_v2_5_1/src/i2c_master_bit_ctrl.vhd 0 additions, 0 deletions

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FASEC_prototype.ip_user_files/bd/system_design/ipshared/user.org/axi_wb_i2c_master_v2_5_1/src/i2c_master_byte_ctrl.vhd 0 additions, 0 deletions

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FASEC_prototype.ip_user_files/bd/system_design/ipshared/user.org/axi_wb_i2c_master_v2_5_1/src/i2c_master_top.vhd 0 additions, 0 deletions

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FASEC_prototype.ip_user_files/bd/system_design/ipshared/user.org/fasec_hwtest_v2_6_2/FASEC_hwtest.srcs/sources_1/new/dac7716_spi.vhd 151 additions, 0 deletions

...st_v2_6_2/FASEC_hwtest.srcs/sources_1/new/dac7716_spi.vhd
FASEC_prototype.ip_user_files/bd/system_design/ipshared/user.org/fasec_hwtest_v2_6_2/FASEC_hwtest.srcs/sources_1/new/general_fmc.vhd 95 additions, 24 deletions

...st_v2_6_2/FASEC_hwtest.srcs/sources_1/new/general_fmc.vhd
FASEC_prototype.ip_user_files/bd/system_design/ipshared/user.org/fasec_hwtest_v2_6_2/FASEC_hwtest.srcs/sources_1/new/top_mod.vhd 386 additions, 0 deletions

...hwtest_v2_6_2/FASEC_hwtest.srcs/sources_1/new/top_mod.vhd
FASEC_prototype.ip_user_files/sim_scripts/system_design/activehdl/README.txt 1 addition, 1 deletion

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FASEC_prototype.ip_user_files/sim_scripts/system_design/activehdl/compile.do 16 additions, 14 deletions

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FASEC_prototype.ip_user_files/sim_scripts/system_design/activehdl/file_info.txt 16 additions, 14 deletions

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FASEC_prototype.ip_user_files/sim_scripts/system_design/activehdl/system_design.sh 1 addition, 1 deletion

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FASEC_prototype.ip_user_files/sim_scripts/system_design/ies/README.txt 1 addition, 1 deletion

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with 832 additions and 1466 deletions

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