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EtherBone Core
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76da67c2
Commit
76da67c2
authored
13 years ago
by
Wesley W. Terpstra
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Test sub-word access
parent
c4436e18
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1
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1 changed file
api/test/loopback.cpp
+18
-4
18 additions, 4 deletions
api/test/loopback.cpp
with
18 additions
and
4 deletions
api/test/loopback.cpp
+
18
−
4
View file @
76da67c2
...
@@ -78,6 +78,18 @@ Record::Record(width_t width_) {
...
@@ -78,6 +78,18 @@ Record::Record(width_t width_) {
width_t
addrw
=
width_
>>
4
;
width_t
addrw
=
width_
>>
4
;
width_t
dataw
=
width_
&
EB_DATAX
;
width_t
dataw
=
width_
&
EB_DATAX
;
if
((
seed
&
31
)
==
0
)
{
/* Perform sub-word access */
if
((
seed
&
32
)
!=
0
)
dataw
/=
2
;
if
((
seed
&
64
)
!=
0
)
dataw
/=
2
;
if
((
seed
&
128
)
!=
0
)
dataw
/=
2
;
if
(
dataw
==
0
)
dataw
=
1
;
seed
>>=
8
;
}
else
{
seed
>>=
5
;
}
width
=
(
addrw
<<
4
)
|
dataw
;
width
=
(
addrw
<<
4
)
|
dataw
;
address
=
rand
();
address
=
rand
();
...
@@ -240,11 +252,13 @@ void TestCycle::launch(Device device, int length, int* success_) {
...
@@ -240,11 +252,13 @@ void TestCycle::launch(Device device, int length, int* success_) {
for
(
int
op
=
0
;
op
<
length
;
++
op
)
{
for
(
int
op
=
0
;
op
<
length
;
++
op
)
{
Record
r
(
device
.
width
());
Record
r
(
device
.
width
());
format_t
format
=
(
r
.
width
&
EB_DATAX
)
|
EB_BIG_ENDIAN
;
switch
(
r
.
type
)
{
switch
(
r
.
type
)
{
case
READ_BUS
:
cycle
.
read
(
r
.
address
,
r
.
width
,
0
);
break
;
case
READ_BUS
:
cycle
.
read
(
r
.
address
,
format
,
0
);
break
;
case
READ_CFG
:
cycle
.
read_config
(
r
.
address
,
r
.
width
,
0
);
break
;
case
READ_CFG
:
cycle
.
read_config
(
r
.
address
,
format
,
0
);
break
;
case
WRITE_BUS
:
cycle
.
write
(
r
.
address
,
r
.
width
,
r
.
data
);
break
;
case
WRITE_BUS
:
cycle
.
write
(
r
.
address
,
format
,
r
.
data
);
break
;
case
WRITE_CFG
:
cycle
.
write_config
(
r
.
address
,
r
.
width
,
r
.
data
);
break
;
case
WRITE_CFG
:
cycle
.
write_config
(
r
.
address
,
format
,
r
.
data
);
break
;
}
}
records
.
push_back
(
r
);
records
.
push_back
(
r
);
...
...
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