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DIOT Zynq Ultrascale-based System Board
Commits
2414552c
Commit
2414552c
authored
May 12, 2022
by
Alén Arias Vázquez
😎
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fix MMAP
parent
2df21e26
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5 additions
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4 deletions
+5
-4
fpga_device.v
gw/common-ip/fpga_device/src/fpga_device.v
+5
-4
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gw/common-ip/fpga_device/src/fpga_device.v
View file @
2414552c
...
...
@@ -103,10 +103,10 @@ module fpga_device # (
localparam
c_ADDR_HASH_3
=
'h17
;
localparam
c_ADDR_HASH_4
=
'h18
;
localparam
c_ADDR_DNA_0
=
'h19
;
localparam
c_ADDR_DNA_1
=
'h
20
;
localparam
c_ADDR_DNA_2
=
'h
21
;
localparam
c_ADDR_TAG_LSB
=
'h
22
;
localparam
c_ADDR_TAG_MSB
=
'h
23
;
localparam
c_ADDR_DNA_1
=
'h
1A
;
localparam
c_ADDR_DNA_2
=
'h
1B
;
localparam
c_ADDR_TAG_LSB
=
'h
1C
;
localparam
c_ADDR_TAG_MSB
=
'h
1D
;
//! Axi lite auxiliary regs
reg
[
g_S_AXI_ADDR_WIDTH
-
1
:
0
]
s_araddr
;
...
...
@@ -211,6 +211,7 @@ module fpga_device # (
)
i_dna_reader
(
.
clk_i
(
S_AXI_ACLK
)
,
.
rst_n_i
(
S_AXI_ARESETN
)
,
.
dna_rdy_o
()
,
.
dna_o
(
s_dna
)
)
;
...
...
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