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DIOT Zynq Ultrascale-based System Board
DIOT Zynq Ultrascale-based System Board
Commit 17444df9 authored by Adam Wujek's avatar Adam Wujek
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sw/configs/device-tree: add HW v2 support 

Signed-off-by: 's avatarAdam Wujek <dev_public@wujek.eu>
parent 1079911f
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Showing with 232 additions and 4 deletions
sw/Makefile
View file @ 17444df9
......@@ -424,11 +424,10 @@ dtb_generate: dtb_prepare dtc_artifacts $(XSCT_BIN) $(GW_XSA) \
$(VT)echo "$(CO)Generate device-tree... done$(NC)" $(LOGT)
$(V) echo `date` > _done/$@ $(LOG)
dtb_config: dtb_generate configs/device-tree/pl-user.dtsi configs/device-tree/ps-user.dtsi
dtb_config: dtb_generate configs/device-tree/pl-user_v$(SB_VER).dtsi configs/device-tree/ps-user_v$(SB_VER).dtsi
$(VT)echo "$(CO)Configuring device-tree...$(NC)" $(LOGT)
$(V) cp -v configs/device-tree/pl-user.dtsi "$(DTB_DIR)" $(LOG)
$(V) cp -v configs/device-tree/ps-user.dtsi "$(DTB_DIR)" $(LOG)
$(V) cp -v "$(DTB_DIR)"/pl-user.dtsi "$(DTB_DIR)"/ps-user.dtsi "$(DTB_DIR)"/build/device-tree $(LOG)
$(V) cp -v configs/device-tree/pl-user_v$(SB_VER).dtsi "$(DTB_DIR)"/build/device-tree/pl-user.dtsi $(LOG)
$(V) cp -v configs/device-tree/ps-user_v$(SB_VER).dtsi "$(DTB_DIR)"/build/device-tree/ps-user.dtsi $(LOG)
$(VT)echo "$(CO)Configuring device-tree... done$(NC)" $(LOGT)
$(V) echo `date` > _done/$@ $(LOG)
......
sw/configs/device-tree/pl-user_v2.dtsi 0 → 100644
View file @ 17444df9
/*
* author: Adam Wujek
* copyright: CERN 2021
*/
/ {
};
&axi_iic_0 {
interrupt-names = "iic2intc_irpt";
interrupt-parent = <&gic>;
interrupts = <0 89 4>;
/* SFP addr 0x50 and 0x51 */
wr_eeprom: eeprom@54 {
compatible = "atmel,24c64";
reg = <0x54>;
// read-only;
};
mac_eeprom1: eeprom@55 {
compatible = "atmel,24c02";
reg = <0x55>;
read-only;
/* MAC is at the offset 0xfa */
};
mac_eeprom2: eeprom@56 {
compatible = "atmel,24c02";
reg = <0x56>;
read-only;
/* MAC is at the offset 0xfa */
};
};
&axi_iic_1 {
interrupt-names = "iic2intc_irpt";
interrupt-parent = <&gic>;
interrupts = <0 90 4>;
/* EEPROM on peripheral boards */
pb: pb@50 {
compatible = "atmel,24c02";
reg = <0x50>;
};
};
sw/configs/device-tree/ps-user.dtsi → sw/configs/device-tree/ps-user_v1.dtsi
View file @ 17444df9
......@@ -26,6 +26,7 @@
bootargs = "earlycon console=ttyPS0,115200 clk_ignore_unused";
stdout-path = "serial0:115200n8";
xlnx,eeprom = &mac_eeprom;
hw_ver = "1";
};
aliases {
i2c0 = &i2c0;
......
sw/configs/device-tree/ps-user_v2.dtsi 0 → 100644
View file @ 17444df9
/*
* author: Adam Wujek
* copyright: CERN 2021
*/
/ {
/* 48MHz reference crystal */
ref48: ref48M {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <48000000>;
};
/* 25MHz From WR */
WR25: WR25M {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <25000000>;
};
chosen {
bootargs = "earlycon console=ttyPS0,115200 clk_ignore_unused";
stdout-path = "serial0:115200n8";
xlnx,eeprom = &mac_eeprom1;
hw_ver = "2";
};
aliases {
i2c0 = &i2c0;
i2c1 = &i2c1;
i2c2 = &axi_iic_0;
i2c3 = &axi_iic_1;
};
};
&gem0 {
/* fallback MAC address */
local-mac-address = [00 0a 35 00 22 01];
phy-handle = <&phy9>;
phy9: phy@9 {
reg = <0x9>;
xlnx,phy-type = <0x5>;
};
};
&sdhci1 {
disable-wp;
no-1-8-v;
};
&i2c0 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
fmc_eeprom: fmc_eeprom@50 {
compatible = "atmel,24c02";
reg = <0x50>;
};
};
&i2c1 {
#address-cells = <1>;
#size-cells = <0>;
status = "okay";
clock-frequency = <400000>;
i2c-mux@70 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "nxp,pca9548";
reg = <0x70>;
i2c@0 {
#address-cells = <1>;
#size-cells = <0>;
reg = <0>;
irps5401@44 {
compatible = "infineon,irps5401";
reg = <0x44>;
};
irps5401@45 {
compatible = "infineon,irps5401";
reg = <0x45>;
};
};
i2c@1 {
#address-cells = <1>;
#size-cells = <0>;
reg = <1>;
lm75_ddr@48 {
compatible = "national,lm75a";
reg = <0x48>;
};
lm75_fmc@49 {
compatible = "national,lm75a";
reg = <0x49>;
};
lm75_dcdc@4a {
compatible = "national,lm75a";
reg = <0x4a>;
};
};
i2c@2 {
#address-cells = <1>;
#size-cells = <0>;
reg = <2>;
si5341@76 {
#clock-cells = <2>;
#address-cells = <1>;
#size-cells = <0>;
compatible = "silabs,si5341";
reg = <0x76>;
clocks = <&WR25>, <&ref48>;
clock-names = "in0", "xtal";
};
};
i2c@4 {
#address-cells = <1>;
#size-cells = <0>;
reg = <4>;
max6639_fpga@2c {
compatible = "maxim,max6639";
reg = <0x2c>;
};
};
i2c_sfp: i2c@5 {
#address-cells = <1>;
#size-cells = <0>;
reg = <5>;
/* Power Supplies */
psu1: psu@18 {
compatible = "D57500520";
reg = <0x18>;
};
psu2: psu@19 {
compatible = "D57500520";
reg = <0x19>;
};
};
};
};
&qspi {
#address-cells = <1>;
#size-cells = <0>;
flash0: flash@0 {
compatible = "n25q512a","micron,m25p80","jedec,spi-nor";
spi-tx-bus-width=<1>;
spi-rx-bus-width=<4>;
reg = <0x0>;
#address-cells = <1>;
#size-cells = <1>;
spi-max-frequency = <108000000>;
partition@0x00000000 {
label = "boot";
reg = <0x00000000 0x02000000>; /* 32MB */
};
partition@0x02000000 {
label = "bootenv";
reg = <0x02000000 0x00040000>; /* 256KB */
};
partition@0x02040000 {
label = "kernel";
reg = <0x02040000 0x04000000>; /* 64MB */
};
};
};
&gpio {
gpio-line-names =
/* 0 1 2 3 4 5 6 7 8 9 */
"", "", "", "", "", "", "", "", "", "", /* 0 - 9 */
"", "", "", "", "", "", "", "", "", "", /* 10 - 19 */
"", "", "", "", "", "", "", "", "", "SFP_TX_DISABLE", /* 20 - 29 */
"USER_LED2", "", "", "SYSEN_N", "", "", "FMC_PRSNT", "", "", "", /* 30 - 39 */
"", "", "", "", "", "", "", "", "", "", /* 40 - 49 */
"", "", "", "", "", "", "", "", "", "", /* 50 - 59 */
"", "", "", "", "", "", "", "", "", "", /* 60 - 69 */
"PCB_VER0", "PCB_VER1", "PCB_VER2", "PCB_VER3", "", "", "", "", "", "PWR_Cycle_REQ", /* 70 - 79 */
"PWR_Cycle_STR", "P_PRES0", "P_PRES1", "SERVMOD_N1", "SERVMOD_N2", "SERVMOD_N3", "SERVMOD_N4", "SERVMOD_N5", "SERVMOD_N6", "SERVMOD_N7", /* 80 - 89 */
"SERVMOD_N8", "RST_N", "PSU_ALERT", "", "", "", "", "", "", "", /* 90 - 99 */
"", "", "", "", "", "", "", "", "", "", /* 100 - 109 */
"", "", "", "", "", "", "", "", "", "", /* 110 - 119 */
"", "", "", "", "", "", "", "", "", "", /* 120 - 129 */
"", "", "", "", "", "", "", "", "", "", /* 130 - 139 */
"", "", "", "", "", "", "", "", "", "", /* 140 - 149 */
"", "", "", "", "", "", "", "", "", "", /* 150 - 159 */
"", "", "", "", "", "", "", "", "", "", /* 160 - 169 */
"", "", "", ""; /* 170 - 173 */
};
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