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DIOT Igloo2-based radiation-tolerant System Board
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DIOT Igloo2-based radiation-tolerant System Board
Issues
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3
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171
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174
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FLASH_MISO needs a pull-up
#134
· opened
Oct 12, 2021
by
Tristan Gingold
v2.0
minor
CLOSED
1
updated
Apr 20, 2023
Revisit pcb version
#133
· opened
Oct 12, 2021
by
Tristan Gingold
v2.0
Done
improvement
CLOSED
7
updated
Jan 24, 2023
Triplicate clock input
#132
· opened
Oct 05, 2021
by
Tristan Gingold
improvement
CLOSED
4
updated
Jan 10, 2023
Add a reset button (for debugging)
#131
· opened
Sep 30, 2021
by
Tristan Gingold
v2.0
Done
improvement
CLOSED
6
updated
Jan 24, 2023
Add a 3 pin header to connect a UART for debugging
#130
· opened
Sep 29, 2021
by
Tristan Gingold
improvement
CLOSED
2
updated
Jan 10, 2023
Fix OD_2V5C and OD_2V5D net labels
#129
· opened
Sep 29, 2021
by
Tristan Gingold
cosmetics
CLOSED
2
updated
Dec 01, 2022
Make FMC JTAG pull-{up,down} resistors unmounted by default
#128
· opened
Sep 28, 2021
by
Christos Gentsos
v2.0
Done
improvement
CLOSED
0
updated
Jan 24, 2023
investigate adding current limiter for FPGA core to prevent destructive SELs
#127
· opened
Sep 21, 2021
by
Grzegorz Daniluk
improvement
CLOSED
2
updated
Jan 10, 2023
add de-latching circuit to monitor FPGA core current
#126
· opened
Sep 21, 2021
by
Grzegorz Daniluk
improvement
CLOSED
3
updated
Jan 10, 2023
V1 - No link to project sources on the PCB silkscreen
#125
· opened
Jun 21, 2021
by
Erik van der Bij
v2.0
cosmetics
Layout
CLOSED
1
updated
Mar 30, 2023
front panel LEDs too short to reach the front panel
#124
· opened
Jun 21, 2021
by
Grzegorz Daniluk
v2.0
Layout
minor
CLOSED
1
updated
Apr 18, 2023
LC filter layout can be improved
#123
· opened
May 21, 2021
by
Christos Gentsos
layout v1.0
minor
CLOSED
0
updated
May 21, 2021
P2V5_A rail is unused, it has to be removed
#122
· opened
May 20, 2021
by
Christos Gentsos
layout v1.0
minor
CLOSED
0
updated
May 21, 2021
Height of components on bottom layer
#121
· opened
May 18, 2021
by
Spyridon Georgakakis
improvement
CLOSED
2
updated
Jan 10, 2023
Different kind of Vias...
#120
· opened
May 17, 2021
by
Spyridon Georgakakis
layout v1.0
CLOSED
1
updated
May 19, 2021
Stack Up Layer Legend does not match the stack up
#119
· opened
May 17, 2021
by
Spyridon Georgakakis
layout v1.0
CLOSED
0
updated
May 17, 2021
Board guide
#118
· opened
May 17, 2021
by
Spyridon Georgakakis
layout v1.0
CLOSED
1
updated
May 19, 2021
C102 not directly connected to IC22
#117
· opened
May 17, 2021
by
Spyridon Georgakakis
layout v1.0
CLOSED
0
updated
May 17, 2021
C180 is placed Under FPGA and not IC32
#116
· opened
May 17, 2021
by
Spyridon Georgakakis
layout v1.0
CLOSED
1
updated
May 19, 2021
IC27 : Decoupling capacitor placed on wrong pin
#115
· opened
May 17, 2021
by
Spyridon Georgakakis
layout v1.0
CLOSED
0
updated
May 17, 2021
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