FPGA_Banks_6_7: I guess we don't need the filter circuit for SERDES_0_L23_*
Anyway we're using only lane 0 of serdes 0. AC393 page 11 shows how to connect unused lines.
Anyway we're using only lane 0 of serdes 0. AC393 page 11 shows how to connect unused lines.
No child items are currently assigned. Use child items to break down this issue into smaller parts.
Link issues together to show that they're related. Learn more.
changed the description
That sounds right but to be 100% sure I opened a case with Microsemi to double-check.
Confirmed, we should still power it but we can omit the RC filter.
closed via commit 9af246ca