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DIOT Monitoring Module
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628f36ee
Commit
628f36ee
authored
Dec 03, 2021
by
Christos Gentsos
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Main: only enable 48MHz clock generator when USB is enabled
parent
9e119357
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hpl_gclk_config.h
main_fw/atmel_start_prj/config/hpl_gclk_config.h
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main_fw/atmel_start_prj/config/hpl_gclk_config.h
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628f36ee
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@@ -159,7 +159,11 @@
// <i> Indicates whether generic clock 2 configuration is enabled or not
// <id> enable_gclk_gen_2
#ifndef CONF_GCLK_GENERATOR_2_CONFIG
#ifdef USB_ENABLE
#define CONF_GCLK_GENERATOR_2_CONFIG 1
#else
#define CONF_GCLK_GENERATOR_2_CONFIG 0
#endif
#endif
// <h> Generic Clock Generator Control
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@@ -167,7 +171,11 @@
// <i> Indicates whether Run in Standby is enabled or not
// <id> gclk_arch_gen_2_RUNSTDBY
#ifndef CONF_GCLK_GEN_2_RUNSTDBY
#ifdef USB_ENABLE
#define CONF_GCLK_GEN_2_RUNSTDBY 1
#else
#define CONF_GCLK_GEN_2_RUNSTDBY 0
#endif
#endif
// <q> Divide Selection
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@@ -202,7 +210,11 @@
// <i> Indicates whether Generic Clock Generator Enable is enabled or not
// <id> gclk_arch_gen_2_enable
#ifndef CONF_GCLK_GEN_2_GENEN
#ifdef USB_ENABLE
#define CONF_GCLK_GEN_2_GENEN 1
#else
#define CONF_GCLK_GEN_2_GENEN 0
#endif
#endif
// <y> Generic clock generator 2 source
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