Schematics design review checklist
Following Schematics design review checklist:
- in grey font -> points not checked
- in bold font -> remarks
Create and study BOM, powerlist and netlist
- Use as few different components as possible. -> Not fully optimal, but OK
\textcolor{grey}{\text{Print out the power and ground list for all ICs and check if they’re correctly connected.}}
\textcolor{grey}{\text{Print out the netlist, sort alphabetically and check for any inconsistencies (in naming, bus signals all used).}}
- Check if all capacitors are correctly de-rated for their operating voltage. -> see #7 (closed)
\textcolor{grey}{\text{For any newly created symbols, check the pin numbering}}
- Verify that the BOM is describing fully the components used.
- Manufacturer, Manufacturer full ordering number (including package and speed): e.g., LINEAR TECHNOLOGY LT1931ES5#TRMPBF. -> seems missing for some
- For generic components: all parameters are defined in the symbol: e.g., GENERIC R0603_220R_1%_0.1W_100PPM. -> not present
- Verify that the BOM is completely generated out of the schematics. -> OK
- Verify that the BOM does not contain any components that are at end-of-life (EOL), obsolete or hard to get. -> as much as it can be
- Non-mounted components should be marked in the schematics as such. -> marking of "amplification register" missing?
Study schematics
- Buses: check if all bits are used. -> OK
- Differential signals: check if both _P and _N are used (and have really this polarity). -> OK
\textcolor{grey}{\text{Check each connection of ICs. Notably hard-wired settings of ICs (division/amplification factors, operating modes etc.). Add a note.}}
- Check polarity of capacitors, notably on those connected to negative power supplies. -> OK (non-polarized capacitors only)
- Check correct polarity of diodes and LEDs. -> OK
\textcolor{grey}{\text{Check if enough decoupling for each IC.}}
\textcolor{grey}{\text{Check global decoupling of power supplies (large cap at point of generation or entry).}}
\textcolor{grey}{\text{Check protection circuits on the signals. Verify in detail where current flows through.}}
\textcolor{grey}{\text{Check if signal levels are compatible between outputs and inputs (LVTTL etc.).}}
\textcolor{grey}{\text{Check if direction of signals correct (i.e. hierarchy connectors, FMC uni-directional)}}
- Check for any crosses on wires (showing no connection) and check connectivity of crossing wires (a dot should show connected). -> OK
- Check if there is a note about hard-wired settings of ICs (division/amplification factors, operating modes etc.). -> OK
- Check if components are aligned to make the schematics look clear. -> OK
- Check consistency of naming and numbering of schematic pages.
- see #6 (closed)
- add title "FSI DIOT Photodetection module 8ch" - the same for all sheets
- add subtitles consistent with file/sheet names
- add Designer name, date, checked by
- see as example DIOT-SB-ZU
\textcolor{grey}{\text{Check for testability: can all signals be tested on a production test system (e.g., without needing probes, calibration etc.).}}
- Check if version or revision of a PCB can be accessed via gateware. -> It can be made available in FRU, no hard-wired version on PCB, consider adding,e.g.:
- Check if the grid is identical throughout the design (50 mil recommended) -> 100mil and 50 mil is used, can you unify?
- Check if no element is placed outside the grid (Altium: check for Off Grid elements shall be enabled) -> FP_LED1 seems off grid
Schematics conventions
- Use same page size (e.g., A3) for all schematics pages.-> Sheets fpga-config and CPCIS_Connectors_P1_P6 use A3 size, all the rest A3, can you correct?
- Check that schematics read from left to right. Make the signals flow that direction: i.e., inputs on the left, outputs on the right of the page. -> OK
- Show clearly from which power supply each component is powered. -> OK
- Power symbol for positive supply should point up. Those for negative supplies and GND should point down. -> in sheet afe, GND connected to C150 should point down
- Name power P3V3, P5V, M5V, GND, AGND etc. -> Following this convention, it seems LVDD and AVDD should indicate voltage
- Clock signals: add frequency in name (eg. CLK_100, CLK20_VCXO). -> Add where possible the freq in the name
- Negative signal names: suffix _N (e.g. PB_RESET_N), do not use over-line that disappears in text files. -> OK
- Number components simply, like R1, R3, C1, L1 etc. Do not use names like Rbias1 and Cin2 as one may see used in datasheets. -> OK
- Unused signals available on connectors (e.g. P12V, VADJ): do not connect a wire to them, leave open. -> OK
- Mark resistor values as follows: 47 (for 47 Ohm), 4R7 (for 4.7 Ohm), 4K7 (for 4.7 kOhm = 4700 Ohm) -> OK
Documentation
- Check that each schematics page has on the same place the Open Hardware Licence text of its corresponding variant -> Add appropriate see #6 (closed) and #1 (closed)
- Make sure that all texts, indications and annotations are written in English. -> OK
\textcolor{grey}{\text{Check and remove any DRC error flags.}}
- Document all inputs and outputs on the schematics pages -> OK