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DDR3 controller for Spartan6
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DDR3 controller for Spartan6
Commits
09f14bcf
Commit
09f14bcf
authored
Jun 25, 2015
by
Javier D. Garcia-Lasheras
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Fix minor issues in top Manifest.py
parent
f90e3701
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11 additions
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11 deletions
+11
-11
Manifest.py
hdl/rtl/Manifest.py
+11
-11
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hdl/rtl/Manifest.py
View file @
09f14bcf
...
...
@@ -4,7 +4,7 @@ files = ["ddr3_ctrl.vhd",
"ddr3_ctrl_wrapper_pkg.vhd"
,
"ddr3_ctrl_pkg.vhd"
]
local
=
[
"../common/ip_cores/rtl"
]
local
=
[]
try
:
...
...
@@ -13,33 +13,33 @@ try:
if
ctrl
==
"bank3_32b_32b"
:
local
.
append
(
"../spec/ip_cores/ddr3_ctrl_spec_bank3_32b_32b/user_design/rtl"
)
el
se
if
ctrl
==
"bank3_64b_32b"
:
elif
ctrl
==
"bank3_64b_32b"
:
local
.
append
(
"../spec/ip_cores/ddr3_ctrl_spec_bank3_64b_32b/user_design/rtl"
)
el
se
if
ctrl
==
"bank4_32b_32b"
:
elif
ctrl
==
"bank4_32b_32b"
:
local
.
append
(
"../svec/ip_cores/ddr3_ctrl_svec_bank4_32b_32b/user_design/rtl"
)
el
se
if
ctrl
==
"bank4_64b_32b"
:
elif
ctrl
==
"bank4_64b_32b"
:
local
.
append
(
"../svec/ip_cores/ddr3_ctrl_svec_bank4_64b_32b/user_design/rtl"
)
el
se
if
ctrl
==
"bank5_32b_32b"
:
elif
ctrl
==
"bank5_32b_32b"
:
local
.
append
(
"../svec/ip_cores/ddr3_ctrl_svec_bank5_32b_32b/user_design/rtl"
)
el
se
if
ctrl
==
"bank5_64b_32b"
:
elif
ctrl
==
"bank5_64b_32b"
:
local
.
append
(
"../svec/ip_cores/ddr3_ctrl_svec_bank5_64b_32b/user_design/rtl"
)
el
se
if
ctrl
==
"bank1_32b_32b"
:
elif
ctrl
==
"bank1_32b_32b"
:
local
.
append
(
"../vfc/ip_cores/ddr3_ctrl_vfc_bank1_32b_32b/user_design/rtl"
)
el
se
if
ctrl
==
"bank1_64b_32b"
:
elif
ctrl
==
"bank1_64b_32b"
:
local
.
append
(
"../vfc/ip_cores/ddr3_ctrl_vfc_bank1_64b_32b/user_design/rtl"
)
else
:
print
(
"[ERROR]:DDR3: The controller type is not recognnised!"
)
print
(
"
It must be one of: bank1_32b_32b, bank1_64b_32b, bank3_32b_32b, bank3_64b_32b, bank4_32b_32b, bank4_64b_32b, bank5_32b_32b, bank5_64b_32b."
)
raise
SystemExit
(
"[ERROR]:DDR3: The controller type is not recognised! "
"
It must be one of: bank1_32b_32b, bank1_64b_32b, bank3_32b_32b, bank3_64b_32b, bank4_32b_32b, bank4_64b_32b, bank5_32b_32b, bank5_64b_32b."
)
except
NameError
:
prin
t
(
"[ERROR]:DDR3: The variable ctrls MUST be defined in the top Manifest!"
)
raise
SystemExi
t
(
"[ERROR]:DDR3: The variable ctrls MUST be defined in the top Manifest!"
)
modules
=
{
"local"
:
local
}
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