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Compact Universal Timing Endpoint based on White Rabbit
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Compact Universal Timing Endpoint based on White Rabbit
Commits
e8e6d9c0
Commit
e8e6d9c0
authored
10 years ago
by
Qiang Du
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Flash write/readback verified.
parent
2dc1f007
No related merge requests found
Changes
2
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2 changed files
tools/lib-multiboot/flash_m25p.py
+3
-2
3 additions, 2 deletions
tools/lib-multiboot/flash_m25p.py
tools/lib-multiboot/mbtest.py
+9
-9
9 additions, 9 deletions
tools/lib-multiboot/mbtest.py
with
12 additions
and
11 deletions
tools/lib-multiboot/flash_m25p.py
+
3
−
2
View file @
e8e6d9c0
...
@@ -41,7 +41,6 @@ class FlashM25P:
...
@@ -41,7 +41,6 @@ class FlashM25P:
self
.
ebone
=
comm_params
[
1
]
self
.
ebone
=
comm_params
[
1
]
self
.
mb_base
=
comm_params
[
2
]
self
.
mb_base
=
comm_params
[
2
]
# Low-level SPI transfer using communication type defined in the constructor
# Low-level SPI transfer using communication type defined in the constructor
#
#
# This method handles the OR-ing together of the data bytes and the control
# This method handles the OR-ing together of the data bytes and the control
...
@@ -77,7 +76,9 @@ class FlashM25P:
...
@@ -77,7 +76,9 @@ class FlashM25P:
else
:
else
:
for
i
in
xrange
(
len
(
dat
)):
for
i
in
xrange
(
len
(
dat
)):
wval
.
append
((
ctrl
<<
24
)
|
dat
[
i
])
wval
.
append
((
ctrl
<<
24
)
|
dat
[
i
])
self
.
ebone
.
writemregs
(
self
.
mb_base
+
0x10
,
wval
)
#self.ebone.writemregs(self.mb_base+0x10, wval)
for
v
in
wval
:
self
.
ebone
.
write
(
self
.
mb_base
+
0x10
,
v
)
# Read the data and prepare the return value
# Read the data and prepare the return value
while
(
retval
&
(
1
<<
28
)
==
0
):
while
(
retval
&
(
1
<<
28
)
==
0
):
...
...
This diff is collapsed.
Click to expand it.
tools/lib-multiboot/mbtest.py
+
9
−
9
View file @
e8e6d9c0
...
@@ -16,22 +16,22 @@ def main():
...
@@ -16,22 +16,22 @@ def main():
target
=
EB
(
ip
)
target
=
EB
(
ip
)
target
.
open
()
target
.
open
()
baseaddr
=
0x20800
baseaddr
=
0x20800
flash_address
=
0x
1
0
flash_address
=
0x0
flash_length
=
0x
1
f
flash_length
=
0x
0f
f
file_name
=
'
foo_bit
'
file_name
=
'
foo_bit
'
mb
=
XilMultiboot
(
ETHERBONE
,
target
,
baseaddr
,
file_name
)
mb
=
XilMultiboot
(
ETHERBONE
,
target
,
baseaddr
,
file_name
)
# read id
# read id
id
=
mb
.
flash
.
read_id
()
# id = mb.flash.read_id()
logging
.
info
(
'
Flash ID: 0x
'
+
id
.
encode
(
'
hex
'
))
# logging.info('Flash ID: 0x' + id.encode('hex'))
#logging.info('Programming file %s'% file_name)
#mb.write(flash_address)
#mb.read(0,0xff)
# mb.flash.serase(flash_address)
# mb.flash.serase(flash_address)
mb
.
flash
.
write
(
flash_address
,
range
(
0x15
,
0x15
+
flash_length
))
logging
.
info
(
'
Programming file %s
'
%
file_name
)
mb
.
write
(
flash_address
)
mb
.
read
(
0
,
0xff
)
mb
.
flash
.
write
(
flash_address
,
range
(
0x0
,
0x0
+
flash_length
))
status
=
mb
.
flash
.
rsr
()
status
=
mb
.
flash
.
rsr
()
logging
.
info
(
'
Status: 0x%x
'
,
status
)
logging
.
info
(
'
Status: 0x%x
'
,
status
)
...
...
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