Testing project for the CONV-TTL-RS485 system
This project contains information and design files for systems designed for testing the CONV-TTL-RS485 boards.
As the CONV-TTL-RS485 is very similar to the CONV-TTL-BLO and the RS-485 output connectors are such that wrong (e.g., blocking) signals can not be plugged into the rear-panel, no further stress testing has been performed on the CONV-TTL-RS485
The CONV-TTL-BLO stress test page is given below as a reference:
Gateware test procedure
Production Test Suite
Production Test Suite (PTS) is the environment designed for running functionality tests on boards at the manufacturing site, right after production. It assures that boards comply with a minimum set of quality rules in terms of soldering, mounting and PCB fabrication process.
The PTS system is usually contained within a rack containing an ELMA crate, a laptop with the PTS software installed on it and all other accessories necessary for running tests.
In the case of the CONV-TTL-RS485, the system needs the RTM (CONV-TTL-RTM-RS485) module together with a couple of tester cards (see below) in order to test the RS-485 capabilities of the cards themselves.
The PTS computer runs some scripts that interact with gateware on the CONV-TTL-RS485 FPGA to test functionality of on-board components.
Front module documentation
Documents such as the user guide and the setup guide for setting up the PTS system inside a 19'' rack can be found here:
Rear-transition module documentation
A dedicated page exists for the RTM PTS documentation:
Both the front module and rear transition module PTS systems use a couple of loopback modules which mount on the rear panel. With proper control exerted by gateware on the CONV-TTL-RS485 FPGA, these modules are driven to loop pulses from outputs to inputs so as to test the RS-485 capabilities of the cards.
More details about the tester cards can be found at these links:
The same gateware running on a CONV-TTL-RS485 front module board is used for both the front module and rear transition module PTS systems. A document describing the gateware can be found below:
Theodor-Adrian Stana, Denia Bouhired, March 2018