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Theodor-Adrian Stana authored
The following sections were updated: - 3.1 TTL input logic -- added reflection of no signal detect state in LSR - 3.2 First pulse inhibit -- added delay before enabling the line to conv-common-gw - 3.3 Line input logic -- added reflection of no signal detect state in LSR - 3.4 Switches -- made figure more compact
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| fig | ||
| Makefile | ||
| README | ||
| cern-title.tex | ||
| conv-regs.tex | ||
| hdlg-conv-ttl-blo.bib | ||
| hdlg-conv-ttl-blo.tex | ||
| multiboot-regs.tex |