modules/fmc250m_4ch/*: fix undeterminate ISLA216P initialization

We ned to make sure we have incoming clock to
ISLA216P ADCs. Otherwise we can't initialize
it with certainty.

This fixes #118.

(cherry picked from commit d174d495)

src/sm_io/modules/fmc250m_4ch/sm_io_fmc250m_4ch_core.c

@@ -50,25 +50,6 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
     ASSERT_TEST(inst_id < NUM_FMC250M_4CH_SMIOS, "Number of FMC250M_4CH SMIOs instances exceeded",
             err_num_fmc250m_4ch_smios);
 
-    /* Setup ISLA216P ADC SPI communication */
-    uint32_t i;
-    for (i = 0; i < NUM_FMC250M_4CH_ISLA216P; ++i) {
-        self->smch_isla216p_adc[i] = NULL;
-        self->smch_isla216p_adc[i] = smch_isla216p_new (parent, FMC_250M_ISLA216P_SPI_OFFS,
-            fmc250m_4ch_isla216p_addr[inst_id][i], 0);
-        ASSERT_ALLOC(self->smch_isla216p_adc[i], err_smch_isla216p_adc);
-
-        uint8_t chipid = 0;
-        uint8_t chipver = 0;
-
-        /* Read ISLA216P ID */
-        smch_isla216p_get_chipid (self->smch_isla216p_adc[i], &chipid);
-        DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO, "[sm_io:fmc250m_4ch_core] ISLA216P0 CHIPID: 0x%02X\n", chipid);
-        /* Read ISLA216P Version */
-        smch_isla216p_get_chipver (self->smch_isla216p_adc[i], &chipver);
-        DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO, "[sm_io:fmc250m_4ch_core] ISLA216P0 CHIPVER: 0x%02X\n", chipver);
-    }
-
     /* FMC250M_4CH isntance 0 is the one controlling this CI */
     /* FIXME: This breaks generality for this class */
     if (inst_id == 0) {
@@ -156,6 +137,31 @@ smio_fmc250m_4ch_t * smio_fmc250m_4ch_new (smio_t *parent)
         }
     }
 
+    /* FIXME: We need to be sure that, if the board is ACTIVE, the FMC_ACTIVE_CLK
+     * component has been sucseddfully initialized so that the ADCs has clock. 
+     * Otherwise, we won't be able to RESET the ADCs, leading to undefined 
+     * behavior */
+    sleep (1);
+
+    /* Setup ISLA216P ADC SPI communication */
+    uint32_t i;
+    for (i = 0; i < NUM_FMC250M_4CH_ISLA216P; ++i) {
+        self->smch_isla216p_adc[i] = NULL;
+        self->smch_isla216p_adc[i] = smch_isla216p_new (parent, FMC_250M_ISLA216P_SPI_OFFS,
+            fmc250m_4ch_isla216p_addr[inst_id][i], 0);
+        ASSERT_ALLOC(self->smch_isla216p_adc[i], err_smch_isla216p_adc);
+
+        uint8_t chipid = 0;
+        uint8_t chipver = 0;
+
+        /* Read ISLA216P ID */
+        smch_isla216p_get_chipid (self->smch_isla216p_adc[i], &chipid);
+        DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO, "[sm_io:fmc250m_4ch_core] ISLA216P0 CHIPID: 0x%02X\n", chipid);
+        /* Read ISLA216P Version */
+        smch_isla216p_get_chipver (self->smch_isla216p_adc[i], &chipver);
+        DBE_DEBUG (DBG_SM_IO | DBG_LVL_INFO, "[sm_io:fmc250m_4ch_core] ISLA216P0 CHIPVER: 0x%02X\n", chipver);
+    }
+
     return self;
 
 #if 0