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Commit 9da3c8d1 authored by Samer Kilani's avatar Samer Kilani
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1) Replaced the ADP123 with ADP1752 for the MGTAVCC1V0. This effectively... 

1) Replaced the ADP123 with ADP1752 for the MGTAVCC1V0. This effectively boosts the current output from 300mA to 800mA.
2) Added current monitoring to the FMC 3V3, 12V and VADJ.
3) Saved all schematic in ASCII format
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hardware/altium/Config.SchDoc
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hardware/altium/FMC.SchDoc
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hardware/altium/FPGA_Banks1.SchDoc
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hardware/altium/FPGA_Banks2.SchDoc
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hardware/altium/FPGA_PWR.SchDoc
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hardware/altium/IO.SchDoc
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hardware/altium/Libraries/atfclib.SchLib
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hardware/altium/Libraries/libatfc.PcbLib
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hardware/altium/PWR_APD5052.SchDoc
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hardware/altium/Project Logs for atfc/Config SCH ECO 9-3-2017 12-21-45 PM.LOG 0 → 100644
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hardware/altium/Project Logs for atfc/Config SCH ECO 9-3-2017 12-22-21 PM.LOG 0 → 100644
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hardware/altium/Project Logs for atfc/FMC SCH ECO 9-3-2017 12-21-45 PM.LOG 0 → 100644
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hardware/altium/Project Logs for atfc/FMC SCH ECO 9-3-2017 12-22-21 PM.LOG 0 → 100644
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hardware/altium/Project Logs for atfc/FPGA_Banks1 SCH ECO 9-3-2017 12-21-45 PM.LOG 0 → 100644
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hardware/altium/Project Logs for atfc/FPGA_Banks1 SCH ECO 9-3-2017 12-22-21 PM.LOG 0 → 100644
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hardware/altium/Project Logs for atfc/FPGA_Banks2 SCH ECO 9-3-2017 12-21-45 PM.LOG 0 → 100644
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hardware/altium/Project Logs for atfc/FPGA_Banks2 SCH ECO 9-3-2017 12-22-21 PM.LOG 0 → 100644
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hardware/altium/Project Logs for atfc/FPGA_PWR SCH ECO 9-3-2017 12-21-45 PM.LOG 0 → 100644
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hardware/altium/Project Logs for atfc/FPGA_PWR SCH ECO 9-3-2017 12-22-21 PM.LOG 0 → 100644
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