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Design Rule Check - atfc.drc 37.98 KiB 
Protel Design System Design Rule Check
PCB File : C:\Users\smkilani\Documents\atfc\hardware\altium\atfc.PcbDoc
Date     : 6/6/2017
Time     : 12:17:34 PM

WARNING: 3 Net Ties failed verification
   SMT SIP Component R79-LRMAM1206-R02FT5 (41.072mm,87.17mm) on Component Side, SMT SIP Component R79-LRMAM1206-R02FT5 (41.072mm,87.17mm) on Component Side, has isolated copper
   SMT SIP Component R62-LRMAM1206-R02FT5 (45.282mm,44.526mm) on Component Side, SMT SIP Component R62-LRMAM1206-R02FT5 (45.282mm,44.526mm) on Component Side, has isolated copper
   SMT SIP Component R55-LRMAM1206-R02FT5 (29.643mm,123.464mm) on Component Side, SMT SIP Component R55-LRMAM1206-R02FT5 (29.643mm,123.464mm) on Component Side, has isolated copper

WARNING: Zero hole size multi-layer pad(s) detected
   Pad J2-1(30.3mm,129mm) on Multi-Layer on Net NetJ2_1
   Pad J2-2(30.3mm,135.2mm) on Multi-Layer on Net GND
   Pad J2-3(25.3mm,132.2mm) on Multi-Layer on Net GND

WARNING: Multilayer Pads with 0 size Hole found
   Pad J2-1(30.3mm,129mm) on Multi-Layer
   Pad J2-2(30.3mm,135.2mm) on Multi-Layer
   Pad J2-3(25.3mm,132.2mm) on Multi-Layer

Processing Rule : Clearance Constraint (Gap=0.152mm) (All),(All)
Rule Violations :0

Processing Rule : Short-Circuit Constraint (Allowed=No) (All),(All)
Rule Violations :0

Processing Rule : Un-Routed Net Constraint ( (All) )
Rule Violations :0

Processing Rule : Modified Polygon (Allow modified: No), (Allow shelved: No)
Rule Violations :0

Processing Rule : Width Constraint (Min=0.1mm) (Max=5mm) (Preferred=0.254mm) (All)
Rule Violations :0

Processing Rule : Power Plane Connect Rule(Direct Connect )(Expansion=0.508mm) (Conductor Width=0.254mm) (Air Gap=0.254mm) (Entries=4) (All)
Rule Violations :0

Processing Rule : Hole Size Constraint (Min=0.025mm) (Max=2.54mm) (All)
   Violation between Hole Size Constraint: (3.2mm > 2.54mm) Pad Free-2(112.928mm,131.267mm) on Multi-Layer Actual Hole Size = 3.2mm
   Violation between Hole Size Constraint: (2.7mm > 2.54mm) Pad Free-MH3(175.285mm,39.04mm) on Multi-Layer Actual Hole Size = 2.7mm
   Violation between Hole Size Constraint: (2.7mm > 2.54mm) Pad Free-MH3(20.345mm,39.04mm) on Multi-Layer Actual Hole Size = 2.7mm
   Violation between Hole Size Constraint: (2.7mm > 2.54mm) Pad Free-MH3(20.345mm,139.37mm) on Multi-Layer Actual Hole Size = 2.7mm
   Violation between Hole Size Constraint: (2.7mm > 2.54mm) Pad Free-MH3(175.285mm,139.37mm) on Multi-Layer Actual Hole Size = 2.7mm
   Violation between Hole Size Constraint: (2.7mm > 2.54mm) Pad Free-MH3(166.4mm,116.891mm) on Multi-Layer Actual Hole Size = 2.7mm
   Violation between Hole Size Constraint: (2.7mm > 2.54mm) Pad Free-MH3(166.4mm,53.891mm) on Multi-Layer Actual Hole Size = 2.7mm
Rule Violations :7

Processing Rule : Hole To Hole Clearance (Gap=0.127mm) (All),(All)
Rule Violations :0

Processing Rule : Minimum Solder Mask Sliver (Gap=0.025mm) (All),(All)
   Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.025mm) Between Via (157.353mm,125.298mm) from Component Side to Bottom Side And Pad R111-2(157.422mm,126.015mm) on Component Side [Top Solder] Mask Sliver [0.01mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.021mm < 0.025mm) Between Via (156.606mm,125.287mm) from Component Side to Bottom Side And Pad R109-2(156.606mm,126.015mm) on Component Side [Top Solder] Mask Sliver [0.021mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.012mm < 0.025mm) Between Pad R16-2(29.249mm,105.258mm) on Component Side And Pad B2-3(30.414mm,105.27mm) on Component Side [Top Solder] Mask Sliver [0.012mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.025mm) Between Pad C7-1(77.807mm,87.681mm) on Component Side And Pad IC2-5(76.794mm,87.681mm) on Component Side [Top Solder] Mask Sliver [0.009mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.025mm) Between Pad C6-1(77.807mm,86.589mm) on Component Side And Pad IC2-4(76.794mm,86.606mm) on Component Side [Top Solder] Mask Sliver [0.009mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.022mm < 0.025mm) Between Pad Q2-5(61.096mm,56.177mm) on Component Side And Pad Q2-6_2(60.103mm,55.254mm) on Component Side [Top Solder] Mask Sliver [0.022mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.022mm < 0.025mm) Between Pad Q2-5_2(60.103mm,56.469mm) on Component Side And Pad Q2-6_2(60.103mm,55.254mm) on Component Side [Top Solder] Mask Sliver [0.022mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.022mm < 0.025mm) Between Pad Q2-6(61.096mm,55.547mm) on Component Side And Pad Q2-5_2(60.103mm,56.469mm) on Component Side [Top Solder] Mask Sliver [0.022mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.022mm < 0.025mm) Between Pad Q2-5(61.096mm,56.177mm) on Component Side And Pad Q2-6(61.096mm,55.547mm) on Component Side [Top Solder] Mask Sliver [0.022mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.02mm < 0.025mm) Between Via (67.429mm,51.562mm) from Component Side to Bottom Side And Pad U8-43(67.466mm,52.353mm) on Component Side [Top Solder] Mask Sliver [0.02mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.013mm < 0.025mm) Between Pad R79-2(42.722mm,87.17mm) on Component Side And Pad R79-4(41.529mm,87.17mm) on Component Side [Top Solder] Mask Sliver [0.013mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.013mm < 0.025mm) Between Pad R79-1(39.422mm,87.17mm) on Component Side And Pad R79-3(40.615mm,87.17mm) on Component Side [Top Solder] Mask Sliver [0.013mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,75.621mm) from Component Side to Bottom Side And Pad J1-G13(166.305mm,75.875mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,74.859mm) from Component Side to Bottom Side And Pad J1-G12(166.305mm,74.605mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.008mm < 0.025mm) Between Via (165.695mm,67.95mm) from Component Side to Bottom Side And Pad J1-G7(166.305mm,68.255mm) on Component Side [Top Solder] Mask Sliver [0.008mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.008mm < 0.025mm) Between Via (165.695mm,68.56mm) from Component Side to Bottom Side And Pad J1-G7(166.305mm,68.255mm) on Component Side [Top Solder] Mask Sliver [0.008mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.008mm < 0.025mm) Between Via (165.695mm,66.68mm) from Component Side to Bottom Side And Pad J1-G6(166.305mm,66.985mm) on Component Side [Top Solder] Mask Sliver [0.008mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.008mm < 0.025mm) Between Via (165.695mm,67.29mm) from Component Side to Bottom Side And Pad J1-G6(166.305mm,66.985mm) on Component Side [Top Solder] Mask Sliver [0.008mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (163.13mm,93.401mm) from Component Side to Bottom Side And Pad J1-D27(162.495mm,93.655mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (163.13mm,92.639mm) from Component Side to Bottom Side And Pad J1-D26(162.495mm,92.385mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (163.13mm,78.161mm) from Component Side to Bottom Side And Pad J1-D15(162.495mm,78.415mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (163.13mm,77.399mm) from Component Side to Bottom Side And Pad J1-D14(162.495mm,77.145mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (168.21mm,69.271mm) from Component Side to Bottom Side And Pad J1-H8(167.575mm,69.525mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (168.21mm,68.509mm) from Component Side to Bottom Side And Pad J1-H7(167.575mm,68.255mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,102.291mm) from Component Side to Bottom Side And Pad J1-G34(166.305mm,102.545mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,101.529mm) from Component Side to Bottom Side And Pad J1-G33(166.305mm,101.275mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,98.481mm) from Component Side to Bottom Side And Pad J1-G31(166.305mm,98.735mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,97.719mm) from Component Side to Bottom Side And Pad J1-G30(166.305mm,97.465mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,94.671mm) from Component Side to Bottom Side And Pad J1-G28(166.305mm,94.925mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,93.909mm) from Component Side to Bottom Side And Pad J1-G27(166.305mm,93.655mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,90.861mm) from Component Side to Bottom Side And Pad J1-G25(166.305mm,91.115mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (163.13mm,89.591mm) from Component Side to Bottom Side And Pad J1-D24(162.495mm,89.845mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,90.099mm) from Component Side to Bottom Side And Pad J1-G24(166.305mm,89.845mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (163.13mm,88.829mm) from Component Side to Bottom Side And Pad J1-D23(162.495mm,88.575mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,87.051mm) from Component Side to Bottom Side And Pad J1-G22(166.305mm,87.305mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,86.289mm) from Component Side to Bottom Side And Pad J1-G21(166.305mm,86.035mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,83.241mm) from Component Side to Bottom Side And Pad J1-G19(166.305mm,83.495mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (163.13mm,81.971mm) from Component Side to Bottom Side And Pad J1-D18(162.495mm,82.225mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,82.479mm) from Component Side to Bottom Side And Pad J1-G18(166.305mm,82.225mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (163.13mm,81.209mm) from Component Side to Bottom Side And Pad J1-D17(162.495mm,80.955mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,79.431mm) from Component Side to Bottom Side And Pad J1-G16(166.305mm,79.685mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,78.669mm) from Component Side to Bottom Side And Pad J1-G15(166.305mm,78.415mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (163.13mm,74.351mm) from Component Side to Bottom Side And Pad J1-D12(162.495mm,74.605mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (163.13mm,73.589mm) from Component Side to Bottom Side And Pad J1-D11(162.495mm,73.335mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,71.811mm) from Component Side to Bottom Side And Pad J1-G10(166.305mm,72.065mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (165.67mm,71.049mm) from Component Side to Bottom Side And Pad J1-G9(166.305mm,70.795mm) on Component Side [Top Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.008mm < 0.025mm) Between Via (166.915mm,66.02mm) from Component Side to Bottom Side And Pad J1-G5(166.305mm,65.715mm) on Component Side [Top Solder] Mask Sliver [0.008mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.008mm < 0.025mm) Between Via (166.915mm,64.14mm) from Component Side to Bottom Side And Pad J1-G4(166.305mm,64.445mm) on Component Side [Top Solder] Mask Sliver [0.008mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.025mm < 0.025mm) Between Via (161.865mm,62.205mm) from Component Side to Bottom Side And Pad J1-D2(162.495mm,61.905mm) on Component Side [Top Solder] Mask Sliver [0.025mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.008mm < 0.025mm) Between Via (166.965mm,64.75mm) from Component Side to Bottom Side And Pad J1-H4(167.575mm,64.445mm) on Component Side [Top Solder] Mask Sliver [0.008mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.008mm < 0.025mm) Between Via (166.965mm,65.41mm) from Component Side to Bottom Side And Pad J1-H5(167.575mm,65.715mm) on Component Side [Top Solder] Mask Sliver [0.008mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.021mm < 0.025mm) Between Via (25.425mm,80.058mm) from Component Side to Bottom Side And Pad C102-2(25.756mm,79.23mm) on Component Side [Top Solder] Mask Sliver [0.021mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.021mm < 0.025mm) Between Via (26.162mm,80.058mm) from Component Side to Bottom Side And Pad C102-2(25.756mm,79.23mm) on Component Side [Top Solder] Mask Sliver [0.021mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.012mm < 0.025mm) Between Via (39.091mm,75.842mm) from Component Side to Bottom Side And Pad C106-1(38.322mm,75.842mm) on Component Side [Top Solder] Mask Sliver [0.012mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.024mm < 0.025mm) Between Via (62.222mm,55.728mm) from Component Side to Bottom Side And Pad C79-1(62.4mm,55.01mm) on Component Side [Top Solder] Mask Sliver [0.024mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.024mm < 0.025mm) Between Via (62.588mm,56.21mm) from Component Side to Bottom Side And Pad C85-2(62.425mm,56.928mm) on Component Side [Top Solder] Mask Sliver [0.024mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.014mm < 0.025mm) Between Via (66.464mm,49.378mm) from Component Side to Bottom Side And Pad C96-1(67.099mm,49.943mm) on Component Side [Top Solder] Mask Sliver [0.014mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.025mm) Between Via (71.806mm,109.372mm) from Component Side to Bottom Side And Pad J3-10(71.823mm,110.838mm) on Component Side [Top Solder] Mask Sliver [0.009mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.025mm) Between Via (72.606mm,109.372mm) from Component Side to Bottom Side And Pad J3-9(72.623mm,110.838mm) on Component Side [Top Solder] Mask Sliver [0.009mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.025mm) Between Via (74.206mm,109.372mm) from Component Side to Bottom Side And Pad J3-7(74.223mm,110.838mm) on Component Side [Top Solder] Mask Sliver [0.009mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.025mm) Between Via (75.006mm,109.372mm) from Component Side to Bottom Side And Pad J3-6(75.023mm,110.838mm) on Component Side [Top Solder] Mask Sliver [0.009mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.025mm) Between Via (77.406mm,109.372mm) from Component Side to Bottom Side And Pad J3-3(77.423mm,110.838mm) on Component Side [Top Solder] Mask Sliver [0.009mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.009mm < 0.025mm) Between Via (79.006mm,109.372mm) from Component Side to Bottom Side And Pad J3-1(79.023mm,110.838mm) on Component Side [Top Solder] Mask Sliver [0.009mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.008mm < 0.025mm) Between Via (91.618mm,111.303mm) from Component Side to Bottom Side And Pad R87-2(92.532mm,111.24mm) on Component Side [Top Solder] Mask Sliver [0.008mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.021mm < 0.025mm) Between Via (91.706mm,117.919mm) from Component Side to Bottom Side And Pad R93-1(92.634mm,117.919mm) on Component Side [Top Solder] Mask Sliver [0.021mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.025mm < 0.025mm) Between Via (67.073mm,49.047mm) from Component Side to Bottom Side And Pad R70-1(67.63mm,48.394mm) on Component Side [Top Solder] Mask Sliver [0.025mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.013mm < 0.025mm) Between Pad R55-2(29.643mm,121.814mm) on Component Side And Pad R55-4(29.643mm,123.006mm) on Component Side [Top Solder] Mask Sliver [0.013mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.013mm < 0.025mm) Between Pad R55-1(29.643mm,125.114mm) on Component Side And Pad R55-3(29.643mm,123.921mm) on Component Side [Top Solder] Mask Sliver [0.013mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.013mm < 0.025mm) Between Pad R62-2(43.632mm,44.526mm) on Component Side And Pad R62-4(44.825mm,44.526mm) on Component Side [Top Solder] Mask Sliver [0.013mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.013mm < 0.025mm) Between Pad R62-1(46.932mm,44.526mm) on Component Side And Pad R62-3(45.739mm,44.526mm) on Component Side [Top Solder] Mask Sliver [0.013mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.003mm < 0.025mm) Between Via (112.2mm,98.6mm) from Component Side to Bottom Side And Pad IC1-2(112.624mm,99.553mm) on Bottom Side [Bottom Solder] Mask Sliver [0.003mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.025mm) Between Via (112.2mm,98.6mm) from Component Side to Bottom Side And Pad IC1-1(111.549mm,99.553mm) on Bottom Side [Bottom Solder] Mask Sliver [0.01mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.004mm < 0.025mm) Between Via (112.2mm,98.6mm) from Component Side to Bottom Side And Pad IC1-6(111.549mm,97.653mm) on Bottom Side [Bottom Solder] Mask Sliver [0.004mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.016mm < 0.025mm) Between Via (84.633mm,119.431mm) from Component Side to Bottom Side And Pad L7-1(86.106mm,119.364mm) on Bottom Side [Bottom Solder] Mask Sliver [0.016mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.005mm < 0.025mm) Between Via (36.715mm,51.169mm) from Component Side to Bottom Side And Pad Q1-4(37.323mm,50.669mm) on Bottom Side [Bottom Solder] Mask Sliver [0.005mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.005mm < 0.025mm) Between Via (36.715mm,51.169mm) from Component Side to Bottom Side And Pad Q1-6(37.323mm,51.669mm) on Bottom Side [Bottom Solder] Mask Sliver [0.005mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.023mm < 0.025mm) Between Via (120.1mm,76.6mm) from Component Side to Bottom Side And Pad R3-2(119.744mm,77.38mm) on Bottom Side [Bottom Solder] Mask Sliver [0.023mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (68mm,60.7mm) from Component Side to Bottom Side And Pad R56-1(67.295mm,60.452mm) on Bottom Side [Bottom Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.011mm < 0.025mm) Between Via (91.2mm,95.5mm) from Component Side to Bottom Side And Pad R78-1(90.5mm,96.075mm) on Bottom Side [Bottom Solder] Mask Sliver [0.011mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.015mm < 0.025mm) Between Via (131.4mm,110.8mm) from Component Side to Bottom Side And Pad U3-5(131.333mm,110.028mm) on Bottom Side [Bottom Solder] Mask Sliver [0.015mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.021mm < 0.025mm) Between Via (105.131mm,98.73mm) from Component Side to Bottom Side And Pad U14-4(104.216mm,98.512mm) on Bottom Side [Bottom Solder] Mask Sliver [0.021mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.002mm < 0.025mm) Between Via (166.965mm,65.41mm) from Component Side to Bottom Side And Via (166.915mm,66.02mm) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.002mm] / [Bottom Solder] Mask Sliver [0.002mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.002mm < 0.025mm) Between Via (166.965mm,64.75mm) from Component Side to Bottom Side And Via (166.915mm,64.14mm) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.002mm] / [Bottom Solder] Mask Sliver [0.002mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.016mm < 0.025mm) Between Via (48.3mm,50.6mm) from Component Side to Bottom Side And Via (48.9mm,50.6mm) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.016mm] / [Bottom Solder] Mask Sliver [0.016mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.003mm < 0.025mm) Between Via (68mm,51.7mm) from Component Side to Bottom Side And Via (67.429mm,51.562mm) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.003mm] / [Bottom Solder] Mask Sliver [0.003mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.022mm < 0.025mm) Between Via (62.588mm,56.21mm) from Component Side to Bottom Side And Via (62.222mm,55.728mm) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.022mm] / [Bottom Solder] Mask Sliver [0.022mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.025mm) Between Via (110.49mm,64.465mm) from Component Side to Bottom Side And Via (110.49mm,65.187mm) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.01mm] / [Bottom Solder] Mask Sliver [0.01mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.025mm) Between Via (91.618mm,111.923mm) from Component Side to Bottom Side And Via (91.618mm,111.303mm) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.01mm] / [Bottom Solder] Mask Sliver [0.01mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.025mm) Between Via (91.618mm,112.542mm) from Component Side to Bottom Side And Via (91.618mm,111.923mm) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.01mm] / [Bottom Solder] Mask Sliver [0.01mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.025mm) Between Via (91.618mm,113.162mm) from Component Side to Bottom Side And Via (91.618mm,112.542mm) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.01mm] / [Bottom Solder] Mask Sliver [0.01mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.025mm) Between Via (91.618mm,113.782mm) from Component Side to Bottom Side And Via (91.618mm,113.162mm) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.01mm] / [Bottom Solder] Mask Sliver [0.01mm]
   Violation between Minimum Solder Mask Sliver Constraint: (0.01mm < 0.025mm) Between Via (91.618mm,114.402mm) from Component Side to Bottom Side And Via (91.618mm,113.782mm) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.01mm] / [Bottom Solder] Mask Sliver [0.01mm]
Rule Violations :92

Processing Rule : Silk To Solder Mask (Clearance=0.254mm) (Disabled)(IsPad),(All)
Rule Violations :0

Processing Rule : Silk to Silk (Clearance=0.127mm) (All),(All)
   Violation between Silk To Silk Clearance Constraint: (Collision < 0.127mm) Between Text "Rout1" (35.8mm,124.4mm) on Top Overlay And Track (38.156mm,122.634mm)(38.156mm,135.634mm) on Top Overlay Silk Text to Silk Clearance [0mm]
   Violation between Silk To Silk Clearance Constraint: (Collision < 0.127mm) Between Text "C35" (87.976mm,72.121mm) on Top Overlay And Track (87.941mm,69.501mm)(87.941mm,92.501mm) on Top Overlay Silk Text to Silk Clearance [0mm]
   Violation between Silk To Silk Clearance Constraint: (Collision < 0.127mm) Between Text "C34" (87.951mm,73.671mm) on Top Overlay And Track (87.941mm,69.501mm)(87.941mm,92.501mm) on Top Overlay Silk Text to Silk Clearance [0mm]
   Violation between Silk To Silk Clearance Constraint: (0.12mm < 0.127mm) Between Text "C7" (77.749mm,88.214mm) on Top Overlay And Track (78.13mm,87.986mm)(78.334mm,87.986mm) on Top Overlay Silk Text to Silk Clearance [0.12mm]
   Violation between Silk To Silk Clearance Constraint: (0.041mm < 0.127mm) Between Text "*" (35.1mm,75.5mm) on Top Overlay And Track (35.23mm,75.232mm)(35.23mm,75.435mm) on Top Overlay Silk Text to Silk Clearance [0.041mm]
   Violation between Silk To Silk Clearance Constraint: (0.111mm < 0.127mm) Between Text "C76" (72.5mm,54.9mm) on Top Overlay And Track (73.397mm,55.76mm)(73.6mm,55.76mm) on Top Overlay Silk Text to Silk Clearance [0.111mm]
   Violation between Silk To Silk Clearance Constraint: (0.082mm < 0.127mm) Between Text "C12" (105.9mm,89.2mm) on Bottom Overlay And Track (106.096mm,88.443mm)(106.096mm,88.646mm) on Bottom Overlay Silk Text to Silk Clearance [0.082mm]
   Violation between Silk To Silk Clearance Constraint: (0.058mm < 0.127mm) Between Text "R13" (99.7mm,75.8mm) on Bottom Overlay And Track (99.847mm,75.616mm)(99.847mm,75.819mm) on Bottom Overlay Silk Text to Silk Clearance [0.058mm]
   Violation between Silk To Silk Clearance Constraint: (0.102mm < 0.127mm) Between Text "R19" (165.583mm,98.831mm) on Bottom Overlay And Track (163.805mm,99.162mm)(163.805mm,99.365mm) on Bottom Overlay Silk Text to Silk Clearance [0.102mm]
   Violation between Silk To Silk Clearance Constraint: (0.123mm < 0.127mm) Between Text "R20" (165.71mm,102.667mm) on Bottom Overlay And Track (163.805mm,103.073mm)(163.805mm,103.276mm) on Bottom Overlay Silk Text to Silk Clearance [0.123mm]
   Violation between Silk To Silk Clearance Constraint: (0.012mm < 0.127mm) Between Text "R53" (72mm,51.7mm) on Bottom Overlay And Track (71.264mm,50.851mm)(71.264mm,51.054mm) on Bottom Overlay Silk Text to Silk Clearance [0.012mm]
   Violation between Silk To Silk Clearance Constraint: (0.093mm < 0.127mm) Between Text "R57" (70.3mm,49.8mm) on Bottom Overlay And Track (69.461mm,49.835mm)(69.461mm,50.038mm) on Bottom Overlay Silk Text to Silk Clearance [0.093mm]
   Violation between Silk To Silk Clearance Constraint: (0.113mm < 0.127mm) Between Text "R100" (135.93mm,122.976mm) on Top Overlay And Text "R103" (135.055mm,122.976mm) on Top Overlay Silk Text to Silk Clearance [0.113mm]
   Violation between Silk To Silk Clearance Constraint: (0.113mm < 0.127mm) Between Text "R101" (134.181mm,123.082mm) on Top Overlay And Text "R103" (135.055mm,122.976mm) on Top Overlay Silk Text to Silk Clearance [0.113mm]
   Violation between Silk To Silk Clearance Constraint: (0.113mm < 0.127mm) Between Text "R100" (135.93mm,122.976mm) on Top Overlay And Text "R102" (136.804mm,122.976mm) on Top Overlay Silk Text to Silk Clearance [0.113mm]
   Violation between Silk To Silk Clearance Constraint: (0.113mm < 0.127mm) Between Text "R98" (133.306mm,123.241mm) on Top Overlay And Text "R101" (134.181mm,123.082mm) on Top Overlay Silk Text to Silk Clearance [0.113mm]
   Violation between Silk To Silk Clearance Constraint: (0.113mm < 0.127mm) Between Text "R97" (130.683mm,123.241mm) on Top Overlay And Text "R99" (131.557mm,123.241mm) on Top Overlay Silk Text to Silk Clearance [0.113mm]
   Violation between Silk To Silk Clearance Constraint: (0.113mm < 0.127mm) Between Text "R80" (132.432mm,123.241mm) on Top Overlay And Text "R99" (131.557mm,123.241mm) on Top Overlay Silk Text to Silk Clearance [0.113mm]
   Violation between Silk To Silk Clearance Constraint: (0.113mm < 0.127mm) Between Text "R80" (132.432mm,123.241mm) on Top Overlay And Text "R98" (133.306mm,123.241mm) on Top Overlay Silk Text to Silk Clearance [0.113mm]
   Violation between Silk To Silk Clearance Constraint: (0.111mm < 0.127mm) Between Text "R69" (70.909mm,44.552mm) on Top Overlay And Text "R70" (68.978mm,44.552mm) on Top Overlay Silk Text to Silk Clearance [0.111mm]
   Violation between Silk To Silk Clearance Constraint: (0.111mm < 0.127mm) Between Text "R59" (67.048mm,44.552mm) on Top Overlay And Text "R70" (68.978mm,44.552mm) on Top Overlay Silk Text to Silk Clearance [0.111mm]
   Violation between Silk To Silk Clearance Constraint: (0.06mm < 0.127mm) Between Text "R59" (67.048mm,44.552mm) on Top Overlay And Text "R61" (65.168mm,44.552mm) on Top Overlay Silk Text to Silk Clearance [0.06mm]
   Violation between Silk To Silk Clearance Constraint: (0.102mm < 0.127mm) Between Text "C87" (68.878mm,47.186mm) on Top Overlay And Text "R67" (69.742mm,47.186mm) on Top Overlay Silk Text to Silk Clearance [0.102mm]
   Violation between Silk To Silk Clearance Constraint: (0.093mm < 0.127mm) Between Text "R10" (126.043mm,97.333mm) on Top Overlay And Text "R11" (125.188mm,97.358mm) on Top Overlay Silk Text to Silk Clearance [0.093mm]
   Violation between Silk To Silk Clearance Constraint: (0.051mm < 0.127mm) Between Text "C96" (66.821mm,47.567mm) on Top Overlay And Text "C97" (67.634mm,47.618mm) on Top Overlay Silk Text to Silk Clearance [0.051mm]
Rule Violations :25

Processing Rule : Net Antennae (Tolerance=0mm) (All)
Rule Violations :0

Processing Rule : Length Constraint (Min=0mm) (Max=2540mm) (All)
Rule Violations :0

Processing Rule : Matched Lengths(Tolerance=1.016mm) (InAnyDifferentialPair)
   Violation between Matched Net Lengths: Between Net PMODB4_P And Net PMODB4_N Actual Difference against PMODB4_N is: 2.263mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net PMODB2_P And Net PMODB2_N Actual Difference against PMODB2_N is: 1.791mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net PMODB1_P And Net PMODB1_N Actual Difference against PMODB1_N is: 1.255mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net PMODA3_P And Net PMODA3_N Actual Difference against PMODA3_N is: 1.485mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net PMODA2_P And Net PMODA2_N Actual Difference against PMODA2_N is: 1.513mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net PMODA1_P And Net PMODA1_N Actual Difference against PMODA1_N is: 1.475mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net SFP2_RD_P And Net SFP2_RD_N Actual Difference against SFP2_RD_N is: 1.062mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_MGT_M2C_P And Net FMC_MGT_M2C_N Actual Difference against FMC_MGT_M2C_N is: 1.673mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_MGT_CLK_P And Net FMC_MGT_CLK_N Actual Difference against FMC_MGT_CLK_N is: 4.058mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_MGT_C2M_P And Net FMC_MGT_C2M_N Actual Difference against FMC_MGT_C2M_N is: 1.614mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA32_P And Net FMC_LA32_N Actual Difference against FMC_LA32_N is: 2.188mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA31_P And Net FMC_LA31_N Actual Difference against FMC_LA31_N is: 1.278mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA30_P And Net FMC_LA30_N Actual Difference against FMC_LA30_N is: 2.188mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA29_P And Net FMC_LA29_N Actual Difference against FMC_LA29_N is: 1.328mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA28_P And Net FMC_LA28_N Actual Difference against FMC_LA28_N is: 2.188mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA27_P And Net FMC_LA27_N Actual Difference against FMC_LA27_N is: 3.049mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA26_P And Net FMC_LA26_N Actual Difference against FMC_LA26_N is: 1.759mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA25_P And Net FMC_LA25_N Actual Difference against FMC_LA25_N is: 1.936mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA24_P And Net FMC_LA24_N Actual Difference against FMC_LA24_N is: 2.306mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA23_P And Net FMC_LA23_N Actual Difference against FMC_LA23_N is: 1.355mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA22_P And Net FMC_LA22_N Actual Difference against FMC_LA22_N is: 2.008mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA21_P And Net FMC_LA21_N Actual Difference against FMC_LA21_N is: 2.188mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA20_P And Net FMC_LA20_N Actual Difference against FMC_LA20_N is: 2.478mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA19_P And Net FMC_LA19_N Actual Difference against FMC_LA19_N is: 2.228mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA17_CC_P And Net FMC_LA17_CC_N Actual Difference against FMC_LA17_CC_N is: 2.188mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA16_P And Net FMC_LA16_N Actual Difference against FMC_LA16_N is: 2.187mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA15_P And Net FMC_LA15_N Actual Difference against FMC_LA15_N is: 2.188mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA14_P And Net FMC_LA14_N Actual Difference against FMC_LA14_N is: 2.095mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA13_P And Net FMC_LA13_N Actual Difference against FMC_LA13_N is: 1.686mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA12_P And Net FMC_LA12_N Actual Difference against FMC_LA12_N is: 1.963mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA10_P And Net FMC_LA10_N Actual Difference against FMC_LA10_N is: 1.762mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA09_P And Net FMC_LA09_N Actual Difference against FMC_LA09_N is: 2.389mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA08_P And Net FMC_LA08_N Actual Difference against FMC_LA08_N is: 2.183mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA06_P And Net FMC_LA06_N Actual Difference against FMC_LA06_N is: 3.017mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA05_P And Net FMC_LA05_N Actual Difference against FMC_LA05_N is: 2.16mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA03_P And Net FMC_LA03_N Actual Difference against FMC_LA03_N is: 2.241mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA02_P And Net FMC_LA02_N Actual Difference against FMC_LA02_N is: 2.725mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA01_CC_P And Net FMC_LA01_CC_N Actual Difference against FMC_LA01_CC_N is: 1.666mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_LA00_CC_P And Net FMC_LA00_CC_N Actual Difference against FMC_LA00_CC_N is: 3.977mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_CLK1_M2C_P And Net FMC_CLK1_M2C_N Actual Difference against FMC_CLK1_M2C_N is: 1.657mm, Tolerance : 1.016mm. 
   Violation between Matched Net Lengths: Between Net FMC_CLK0_M2C_P And Net FMC_CLK0_M2C_N Actual Difference against FMC_CLK0_M2C_N is: 2.504mm, Tolerance : 1.016mm. 
Rule Violations :41

Processing Rule : Max Via Stub Length (Back Drilling rule) (Max Stub Length = 0.381mm) (InAnyDifferentialPair)
Rule Violations :0

Processing Rule : Room SFP (Bounding Region = (0mm, 0mm, 50.8mm, 25.4mm) (Disabled)(InComponentClass('SFP'))
Rule Violations :0

Processing Rule : Room Regulators (Bounding Region = (0mm, 0mm, 50.8mm, 25.4mm) (Disabled)(InComponentClass('Regulators'))
Rule Violations :0

Processing Rule : Room PWR_APD5052 (Bounding Region = (0mm, 0mm, 50.8mm, 25.4mm) (Disabled)(InComponentClass('PWR_APD5052'))
Rule Violations :0

Processing Rule : Room IO (Bounding Region = (0mm, 0mm, 50.8mm, 25.4mm) (Disabled)(InComponentClass('IO'))
Rule Violations :0

Processing Rule : Room FMC (Bounding Region = (0mm, 0mm, 50.8mm, 25.4mm) (Disabled)(InComponentClass('FMC'))
Rule Violations :0

Processing Rule : Room Config (Bounding Region = (0mm, 0mm, 50.8mm, 25.4mm) (Disabled)(InComponentClass('Config'))
Rule Violations :0

Processing Rule : Room FPGA_Banks1 (Bounding Region = (0mm, 0mm, 50.8mm, 25.4mm) (Disabled)(InComponentClass('FPGA_Banks1'))
Rule Violations :0

Processing Rule : Room FPGA_PWR (Bounding Region = (0mm, 0mm, 50.8mm, 25.4mm) (Disabled)(InComponentClass('FPGA_PWR'))
Rule Violations :0

Processing Rule : Room FPGA_Banks2 (Bounding Region = (0mm, 0mm, 50.8mm, 25.4mm) (Disabled)(InComponentClass('FPGA_Banks2'))
Rule Violations :0

Processing Rule : Height Constraint (Min=0mm) (Max=25.4mm) (Prefered=12.7mm) (All)
Rule Violations :0


Violations Detected : 165
Waived Violations : 0
Time Elapsed        : 00:00:06