AFCK

Project description

The AMC FMC carrier is partially based on SPEC (supply, WR clocks) design. Among many features, the card has very flexible clock circuit that enables any clock source to be connected to any clock input, including telecom clock, FMC clocks and FPGA.
It is very similar design to AMC FMC board, the only difference is faster FPGA from Kintex7 family.

Main features

• Programmable resources:
  • Xilinx Kintex-7 325T FFG900 FPGA
  • MMC: LPC1764FBD100, optionally Atxmega128A1U-AU

• Memory:
  • 2 GB DDR3 SDRAM (32-bit interface), 800Mhz
  • SPI Flash for FPGA configuration
  • SPI Flash for user data storage
  • EEPROM with MAC and unique ID

• Connectivity:
  • 2 high pin count (HPC) slots for 2 single width mezzanines or 1 double width mezzanine
  • Mini-USB UART connected to FPGA or MMC
  • Mini-USB connected to the IPMI processor
  • Stand-alone power connector(12V, 3.3V aux)
  • SATA connector for Port2, Port3 with possibility of switching to FPGA MGT
  • MGT connected to FMC1, FMC2, Fat Pipe 1, Fat Pipe 2 (optional), Port0, Port1, Port2 (optional), Port3 (optional), RTM (optional)
  • RTM connector with 8 GTP routed to it. Compatible with rtm-sfp8 module.

• Supply:
  • Power supply for FPGA, memory, FMCs - programmable VADJ 1.8-3.3V (independent for each FMC)
  • Voltage and current monitoring for all FMC power buses
  • Clock distribution circuit compatible with WR

• Other:
  • Temperature monitoring: FMC1, FMC2, supply, FPGA core, DDR memory
  • JTAG multiplexer (SCANSTA) for FMC access

Detailed project information

• Documentation:
  • Schematics (PDF, Altium sources)
  • PCB (PDF, Altium source)

• Users

Contacts

Commercial producers

• Creotech, Poland

General question about project

• Filip Świtakowski

Project status

Filip Świtakowski - 08 Oct 2014