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-# Project description
+# AFCK
 
-AFCK
+## Project description
 
 The AMC FMC carrier is partially based on SPEC (supply, WR clocks)
-design. Among many features, the card has very flexible clock circuit
-that enables any clock source to be connected to any clock input,
-including telecom clock, FMC clocks and FPGA.  
+design. Among  
+many features, the card has very flexible clock circuit that enables any
+clock  
+source to be connected to any clock input, including telecom clock, FMC
+clocks  
+and FPGA.  
 It is very similar design to AMC FMC board, the only difference is
-faster FPGA from Kintex7 family;
+faster FPGA  
+from Kintex7 family.
 
-## Main Features
+-----
 
-Functional specifications
+![](/uploads/7be0391d2e301dbaca3fa406b6d604a6/afck.jpg)
+
+-----
+
+## Main features
 
   - Xilinx Kintex-7 325T FFG900 FPGA
   - 2 GB DDR3 SDRAM (32-bit interface)
   - 2 high pin count (HPC) slots for 2 single width mezzanines or 1
-    double width mezzanine
+    double width  
+    mezzanine
   - SPI Flash for FPGA configuration
   - SPI Flash for user data storage
   - JTAG multiplexer (SCANSTA) for FMC access
@@ -28,12 +37,45 @@ Functional specifications
   - SATA connector for Port2, Port3 with possibility of switching to
     FPGA MGT
   - MGT connected to FMC1, FMC2, Fat Pipe 1, Fat Pipe 2 (optional),
-    Port0, Port1, Port2 (optional), Port3 (optional), RTM (optional)
+    Port0, Port1,  
+    Port2 (optional), Port3 (optional), RTM (optional)
   - EEPROM with MAC and unique ID
   - RTM connector with 8 GTP routed to it. Compatible with rtm-sfp8
     module.
 
-# Status
+-----
+
+## Detailed project information
+
+  - Documentation:
+      - Schematics
+        ([PDF](https://www.ohwr.org/project/afck/blob/master/PCB_AMC_FMC_Carrier%20Kintex/SCH_AMC_FMC_Carrier_Kintex7.pdf),
+        [Altium
+        sources](https://www.ohwr.org/project/afck/tree/master/PCB_AMC_FMC_Carrier%20Kintex/SCH))
+      - PCB
+        ([PDF](https://www.ohwr.org/project/afck/blob/master/PCB_AMC_FMC_Carrier%20Kintex/PCB_AMC_FMC_Carrier_Kintex7.pdf),
+        [Altium
+        source](https://www.ohwr.org/project/afck/commits/master/PCB_AMC_FMC_Carrier%20Kintex/AMC_FMC_Carrier_Kintex7.PrjPcb))
+
+<!-- end list -->
+
+  - [Users](Users)
+
+-----
+
+## Contacts
+
+### Commercial producers
+
+  - [Creotech](http://creotech.pl), Poland
+
+### General question about project
+
+  - [Filip Świtakowski](mailto:filip.switakowski@creotech.pl)
+
+-----
+
+## Project status
 
 <table>
 <tbody>
@@ -45,6 +87,14 @@ Functional specifications
 <td>17-03-2014</td>
 <td>Schematics ready for review.</td>
 </tr>
+<tr class="odd">
+<td>22-07-2014</td>
+<td>PCB finished</td>
+</tr>
 </tbody>
 </table>
 
+-----
+
+Filip Świtakowski - 18 Aug 2014
+