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AMC FMC Carrier AFC
Commit 3c073a9a authored by Tomasz Przywózki's avatar Tomasz Przywózki
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v4 community review 1

parent e483ceef
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PCB_uTCA_FMC_Carrier v4/AMC-SATA.Harness 0 → 100644
View file @ 3c073a9a
PORT2=Rx2_P,Rx2_N,Tx2_N,Tx2_P
PORT3=Rx3_P,Rx3_N,Tx3_N,Tx3_P
PCB_uTCA_FMC_Carrier v4/AMC_Connector.Harness 0 → 100644
View file @ 3c073a9a
AMC_ADD=GA0,GA1,GA2
AMC_FABRIC_CLOCK=FCLKA_N,FCLKA_P
AMC_JTAG=TCK,TDI,TDO,TMS,TRST#
AMC_P2P=Rx12_N,Rx12_P,Tx12_N,Tx12_P,Rx13_N,Rx13_P,Tx13_N,Tx13_P,Rx14_N,Rx14_P,Tx14_N,Tx14_P,Rx15_N,Rx15_P,Tx15_N,Tx15_P
AMC_TELECOM_CLOCK=TCLKA_N,TCLKA_P,TCLKB_N,TCLKB_P,TCLKC_N,TCLKC_P,TCLKD_N,TCLKD_P
FAT_PIPE1=Rx4_P,Rx4_N,Tx4_N,Tx4_P,Rx5_P,Rx5_N,Tx5_N,Tx5_P,Rx6_P,Rx6_N,Tx6_N,Tx6_P,Rx7_P,Rx7_N,Tx7_N,Tx7_P
FAT_PIPE2=Rx8_P,Rx8_N,Tx8_N,Tx8_P,Rx9_P,Rx9_N,Tx9_N,Tx9_P,Rx10_P,Rx10_N,Tx10_N,Tx10_P,Rx11_P,Rx11_N,Tx11_N,Tx11_P
I2C=SCL,SDA
MLVDS=Rx17_P,Rx17_N,Tx17_N,Tx17_P,Rx18_P,Rx18_N,Tx18_N,Tx18_P,Rx19_P,Rx19_N,Tx19_N,Tx19_P,Rx20_P,Rx20_N,Tx20_N,Tx20_P
PORT0=Rx0_P,Rx0_N,Tx0_N,Tx0_P
PORT1=Rx1_P,Rx1_N,Tx1_N,Tx1_P
PORT2=Rx2_P,Rx2_N,Tx2_N,Tx2_P
PORT3=Rx3_P,Rx3_N,Tx3_N,Tx3_P
PCB_uTCA_FMC_Carrier v4/AMC_FMC_Carrier v4.PrjPcb 0 → 100644
View file @ 3c073a9a
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PCB_uTCA_FMC_Carrier v4/AMC_FMC_Carrier v4.PrjPcbStructure 0 → 100644
View file @ 3c073a9a
Record=TopLevelDocument|FileName=AMC_FMC_Carrier.SchDoc
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=AMC_CON|SchDesignator=AMC_CON|FileName=AMC_Connector.SchDoc|SymbolType=Normal|RawFileName=AMC_Connector.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=ASATA|SchDesignator=ASATA|FileName=AMC-SATA.SchDoc|SymbolType=Normal|RawFileName=AMC-SATA.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=CLK_MGT|SchDesignator=CLK_MGT|FileName=Clock_management.SchDoc|SymbolType=Normal|RawFileName=Clock_management.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=CPU|SchDesignator=CPU|FileName=CPU.SchDoc|SymbolType=Normal|RawFileName=CPU.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=Designator|SchDesignator=Designator|FileName=I2C_MUX.SchDoc|SymbolType=Normal|RawFileName=I2C_MUX.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=Designator|SchDesignator=Designator|FileName=USB_SERIAL_QUAD.SchDoc|SymbolType=Normal|RawFileName=USB_SERIAL_QUAD.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=FPGA|SchDesignator=FPGA|FileName=FPGA.SchDoc|SymbolType=Normal|RawFileName=FPGA.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=HeightUnderFMC|SchDesignator=HeightUnderFMC|FileName=HeightRuleRoom1.9mm.SchDoc|SymbolType=Normal|RawFileName=HeightRuleRoom1.9mm.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=HPC1|SchDesignator=HPC1|FileName=FMC_connector.SchDoc|SymbolType=Normal|RawFileName=FMC_connector.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=HPC2|SchDesignator=HPC2|FileName=FMC_connector.SchDoc|SymbolType=Normal|RawFileName=FMC_connector.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=JTAG_CONF|SchDesignator=JTAG_CONF|FileName=JTAG_Configuration.schdoc|SymbolType=Normal|RawFileName=JTAG_Configuration.schdoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=M-LVDS_PHY|SchDesignator=M-LVDS_PHY|FileName=M-LVDS PHY.SchDoc|SymbolType=Normal|RawFileName=M-LVDS PHY.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=PWR_MGT|SchDesignator=PWR_MGT|FileName=POWER_Management.SchDoc|SymbolType=Normal|RawFileName=POWER_Management.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=RTCE|SchDesignator=RTCE|FileName=RTCE.SchDoc|SymbolType=Normal|RawFileName=RTCE.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=RTM_CON|SchDesignator=RTM_CON|FileName=RTM_CON.SchDoc|SymbolType=Normal|RawFileName=RTM_CON.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=SDRAM|SchDesignator=SDRAM|FileName=SDRAM.SchDoc|SymbolType=Normal|RawFileName=SDRAM.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=THERMO|SchDesignator=THERMO|FileName=Thermometers.SchDoc|SymbolType=Normal|RawFileName=Thermometers.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FHPC1|SchDesignator=FHPC1|FileName=FMC_HPC1.SchDoc|SymbolType=Normal|RawFileName=FMC_HPC1.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FHPC2|SchDesignator=FHPC2|FileName=FMC_HPC2.SchDoc|SymbolType=Normal|RawFileName=FMC_HPC2.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FMGT|SchDesignator=FMGT|FileName=FPGA_MGT.SchDoc|SymbolType=Normal|RawFileName=FPGA_MGT.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA_SUP|SchDesignator=FPGA_SUP|FileName=FPGA_SUP.SchDoc|SymbolType=Normal|RawFileName=FPGA_SUP.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FSDRAM|SchDesignator=FSDRAM|FileName=FPGA_SDRAM.SchDoc|SymbolType=Normal|RawFileName=FPGA_SDRAM.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=POWER_Management.SchDoc|Designator=SUP_10|SchDesignator=SUP_10|FileName=SUP_1V.SchDoc|SymbolType=Normal|RawFileName=SUP_1V.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=POWER_Management.SchDoc|Designator=SUP_12_18|SchDesignator=SUP_12_18|FileName=SUP_1.2_1.8.SchDoc|SymbolType=Normal|RawFileName=SUP_1.2_1.8.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=POWER_Management.SchDoc|Designator=SUP_15|SchDesignator=SUP_15|FileName=SUP_1.5_3.3.SchDoc|SymbolType=Normal|RawFileName=SUP_1.5_3.3.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=POWER_Management.SchDoc|Designator=SUP_HPC25|SchDesignator=SUP_HPC25|FileName=SUP_2.5_FMC.SchDoc|SymbolType=Normal|RawFileName=SUP_2.5_FMC.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=POWER_Management.SchDoc|Designator=SUP_HPC33|SchDesignator=SUP_HPC33|FileName=SUP_3.3_FMC.SchDoc|SymbolType=Normal|RawFileName=SUP_3.3_FMC.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=POWER_Management.SchDoc|Designator=UI|SchDesignator=UI|FileName=UI_mon.SchDoc|SymbolType=Normal|RawFileName=UI_mon.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Clock_management.SchDoc|Designator=CLK_WR|SchDesignator=CLK_WR|FileName=Clock_WR.SchDoc|SymbolType=Normal|RawFileName=Clock_WR.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Clock_management.SchDoc|Designator=Designator|SchDesignator=Designator|FileName=8V54816A_SUPPLY.SchDoc|SymbolType=Normal|RawFileName=8V54816A_SUPPLY.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
PCB_uTCA_FMC_Carrier v4/CPU.Harness 0 → 100644
View file @ 3c073a9a
AMC_ADD=GA0,GA1,GA2
I2C=SDA,SCL
JTAG=TRSTn,TMS,TDO,TDI,TCK
MISC=PRSNT,PG_M2C,PG_C2M
P_MON=P_PV_TC,P_WARNING,P_CRITICAL
PM_control=EN_RTM_MP,1V5_VTT_EN,EN_P1V8,EN_P1V2,EN_FMC1_P12V,EN_FMC2_P12V,EN_FMC1_PVADJ,EN_FMC2_PVADJ,EN_FMC1_P3V3,EN_FMC2_P3V3,DAC_VADJ_CSn,DAC_VADJ_SDI,DAC_VADJ_CLK,DAC_VADJ_RSTn,EN_P1V0,PGOOD_P1V0,EN_P3V3,EN_RTM_PWR
SPI=SCK1,SSEL1,MISO1,MOSI1,PROGRAM_B,DONE,FLASH_Q/D1,FLASH_SI/D0,FPGA_CCLK,FCS_B\,INIT_B,FLASH_CS_MUX
UART=TxD,RxD
PCB_uTCA_FMC_Carrier v4/Clock_management.Harness 0 → 100644
View file @ 3c073a9a
AMC_FABRIC_CLOCK=FCLKA_N,FCLKA_P
AMC_TELECOM_CLOCK=TCLKA_N,TCLKA_P,TCLKB_N,TCLKB_P,TCLKC_N,TCLKC_P,TCLKD_N,TCLKD_P
CLK_DIFF=CLK_P,CLK_N
FMC_CLOCKS=CLK0_M2C_N,CLK0_M2C_P,CLK1_M2C_N,CLK1_M2C_P,CLK2_BIDIR_N,CLK2_BIDIR_P,CLK3_BIDIR_N,CLK3_BIDIR_P,CLK_DIR
FMC_FPGA_CLK_IN=CLK0_M2C_N,CLK0_M2C_P,CLK1_M2C_N,CLK1_M2C_P,CLK2_BIDIR_N,CLK2_BIDIR_P,CLK3_BIDIR_N,CLK3_BIDIR_P
FPGA_SDRAM_CLK=FPGA_CLK1_N,FPGA_CLK1_P,BOOT_CLK_IN
Helper_I2C=SDA,SCL,OE
I2C=SDA,SCL
MGT_CLK=PCIE_CLK1_P,PCIE_CLK1_N,PCIE_CLK2_P,FP2_CLK2_N,FP2_CLK1_P,FP2_CLK1_N,LINK01_CLK_P,LINK01_CLK_N,LINK23_CLK_P,LINK23_CLK_N
PLL_CTRL=VADJ2_SI57X_SDA,VADJ2_SI57X_SCL,PLL_VADJ2_DAC2_SYNC_N,PLL_VADJ2_DAC_SCLK,PLL_VADJ2_DAC1_SYNC_N,PLL_VADJ2_DAC_DIN,VADJ2_SI57X_OE,VADJ2_SI57X_TUNE,VADJ2_Helper_TUNE
RTM_CLK=AMC_TCLK_P,AMC_TCLK_N,GTP03_P,GTP03_N,GTP47_P,GTP47_N
PCB_uTCA_FMC_Carrier v4/FMC_HPC1.Harness 0 → 100644
View file @ 3c073a9a
FMC_FPGA_CLK_IN=CLK0_M2C_N,CLK0_M2C_P,CLK1_M2C_N,CLK1_M2C_P,CLK2_BIDIR_N,CLK2_BIDIR_P,CLK3_BIDIR_N,CLK3_BIDIR_P
FMC_J1_HA=HA00_CC_N,HA00_CC_P,HA01_CC_N,HA01_CC_P,HA02_N,HA02_P,HA03_N,HA03_P,HA04_N,HA04_P,HA05_N,HA05_P,HA06_N,HA06_P,HA07_N,HA07_P,HA08_N,HA08_P,HA09_N,HA09_P,HA10_N,HA10_P,HA11_N,HA11_P,HA12_N,HA12_P,HA13_N,HA13_P,HA14_N,HA14_P,HA15_N,HA15_P,HA16_N,HA16_P,HA17_CC_N,HA17_CC_P,HA18_N,HA18_P,HA19_N,HA19_P,HA20_N,HA20_P,HA21_N,HA21_P,HA22_N,HA22_P,HA23_N,HA23_P
FMC_J1_HB=HB00_CC_N,HB00_CC_P,HB01_N,HB01_P,HB02_N,HB02_P,HB03_N,HB03_P,HB04_N,HB04_P,HB05_N,HB05_P,HB06_CC_N,HB06_CC_P,HB07_N,HB07_P,HB08_N,HB08_P,HB09_N,HB09_P,HB10_N,HB10_P,HB11_N,HB11_P,HB12_N,HB12_P,HB13_N,HB13_P,HB14_N,HB14_P,HB15_N,HB15_P,HB16_N,HB16_P,HB17_CC_N,HB17_CC_P,HB18_N,HB18_P,HB19_N,HB19_P,HB20_N,HB20_P,HB21_N,HB21_P
FMC_J1_LA=LA00_CC_N,LA00_CC_P,LA01_CC_N,LA01_CC_P,LA02_N,LA02_P,LA03_N,LA03_P,LA04_N,LA04_P,LA05_N,LA05_P,LA06_N,LA06_P,LA07_N,LA07_P,LA08_N,LA08_P,LA09_N,LA09_P,LA10_N,LA10_P,LA11_N,LA11_P,LA12_N,LA12_P,LA13_N,LA13_P,LA14_N,LA14_P,LA15_N,LA15_P,LA16_N,LA16_P,LA17_CC_N,LA17_CC_P,LA18_CC_N,LA18_CC_P,LA19_N,LA19_P,LA20_N,LA20_P,LA21_N,LA21_P,LA22_N,LA22_P,LA23_N,LA23_P,LA24_N,LA24_P,LA25_N,LA25_P,LA26_N,LA26_P,LA27_N,LA27_P,LA28_N,LA28_P,LA29_N,LA29_P,LA30_N,LA30_P,LA31_N,LA31_P,LA32_N,LA32_P,LA33_N,LA33_P
FMC_J1_VREF=VREF_A_M2C,VREF_B_M2C
I2C=SCL,SDA
PCB_uTCA_FMC_Carrier v4/FMC_HPC2.Harness 0 → 100644
View file @ 3c073a9a
FMC_FPGA_CLK_IN=CLK0_M2C_N,CLK0_M2C_P,CLK1_M2C_N,CLK1_M2C_P,CLK2_BIDIR_N,CLK2_BIDIR_P,CLK3_BIDIR_N,CLK3_BIDIR_P
FMC_J1_HA=HA00_CC_N,HA00_CC_P,HA01_CC_N,HA01_CC_P,HA02_N,HA02_P,HA03_N,HA03_P,HA04_N,HA04_P,HA05_N,HA05_P,HA06_N,HA06_P,HA07_N,HA07_P,HA08_N,HA08_P,HA09_N,HA09_P,HA10_N,HA10_P,HA11_N,HA11_P,HA12_N,HA12_P,HA13_N,HA13_P,HA14_N,HA14_P,HA15_N,HA15_P,HA16_N,HA16_P,HA17_CC_N,HA17_CC_P,HA18_N,HA18_P,HA19_N,HA19_P,HA20_N,HA20_P,HA21_N,HA21_P,HA22_N,HA22_P,HA23_N,HA23_P
FMC_J1_HB=HB00_CC_N,HB00_CC_P,HB01_N,HB01_P,HB02_N,HB02_P,HB03_N,HB03_P,HB04_N,HB04_P,HB05_N,HB05_P,HB06_CC_N,HB06_CC_P,HB07_N,HB07_P,HB08_N,HB08_P,HB09_N,HB09_P,HB10_N,HB10_P,HB11_N,HB11_P,HB12_N,HB12_P,HB13_N,HB13_P,HB14_N,HB14_P,HB15_N,HB15_P,HB16_N,HB16_P,HB17_CC_N,HB17_CC_P,HB18_N,HB18_P,HB19_N,HB19_P,HB20_N,HB20_P,HB21_N,HB21_P
FMC_J1_LA=LA00_CC_N,LA00_CC_P,LA01_CC_N,LA01_CC_P,LA02_N,LA02_P,LA03_N,LA03_P,LA04_N,LA04_P,LA05_N,LA05_P,LA06_N,LA06_P,LA07_N,LA07_P,LA08_N,LA08_P,LA09_N,LA09_P,LA10_N,LA10_P,LA11_N,LA11_P,LA12_N,LA12_P,LA13_N,LA13_P,LA14_N,LA14_P,LA15_N,LA15_P,LA16_N,LA16_P,LA17_CC_N,LA17_CC_P,LA18_CC_N,LA18_CC_P,LA19_N,LA19_P,LA20_N,LA20_P,LA21_N,LA21_P,LA22_N,LA22_P,LA23_N,LA23_P,LA24_N,LA24_P,LA25_N,LA25_P,LA26_N,LA26_P,LA27_N,LA27_P,LA28_N,LA28_P,LA29_N,LA29_P,LA30_N,LA30_P,LA31_N,LA31_P,LA32_N,LA32_P,LA33_N,LA33_P
FMC_J1_VREF=VREF_A_M2C,VREF_B_M2C
FPGA_FLASH=FLASH_FCS_B\,FLASH_D3,FLASH_D2,FLASH_Q/D1,FLASH_SI/D0
PLL_CTRL=VADJ2_SI57X_SDA,VADJ2_SI57X_SCL,PLL_VADJ2_DAC2_SYNC_N,PLL_VADJ2_DAC_SCLK,PLL_VADJ2_DAC1_SYNC_N,PLL_VADJ2_DAC_DIN,VADJ2_SI57X_OE,VADJ2_SI57X_TUNE,VADJ2_Helper_TUNE
PCB_uTCA_FMC_Carrier v4/FMC_connector.Harness 0 → 100644
View file @ 3c073a9a
FMC_CLOCKS=CLK_DIR,CLK0_M2C_N,CLK0_M2C_P,CLK1_M2C_N,CLK1_M2C_P,CLK2_BIDIR_N,CLK2_BIDIR_P,CLK3_BIDIR_N,CLK3_BIDIR_P
FMC_J1_DP=DP0_C2M_N,DP0_C2M_P,DP1_C2M_N,DP1_C2M_P,DP2_C2M_N,DP2_C2M_P,DP3_C2M_N,DP3_C2M_P,DP0_M2C_N,DP0_M2C_P,DP1_M2C_N,DP1_M2C_P,DP2_M2C_N,DP2_M2C_P,DP3_M2C_N,DP3_M2C_P
FMC_J1_HA=HA00_CC_N,HA00_CC_P,HA01_CC_N,HA01_CC_P,HA02_N,HA02_P,HA03_N,HA03_P,HA04_N,HA04_P,HA05_N,HA05_P,HA06_N,HA06_P,HA07_N,HA07_P,HA08_N,HA08_P,HA09_N,HA09_P,HA10_N,HA10_P,HA11_N,HA11_P,HA12_N,HA12_P,HA13_N,HA13_P,HA14_N,HA14_P,HA15_N,HA15_P,HA16_N,HA16_P,HA17_CC_N,HA17_CC_P,HA18_N,HA18_P,HA19_N,HA19_P,HA20_N,HA20_P,HA21_N,HA21_P,HA22_N,HA22_P,HA23_N,HA23_P
FMC_J1_HB=HB00_CC_N,HB00_CC_P,HB01_N,HB01_P,HB02_N,HB02_P,HB03_N,HB03_P,HB04_N,HB04_P,HB05_N,HB05_P,HB06_CC_N,HB06_CC_P,HB07_N,HB07_P,HB08_N,HB08_P,HB09_N,HB09_P,HB10_N,HB10_P,HB11_N,HB11_P,HB12_N,HB12_P,HB13_N,HB13_P,HB14_N,HB14_P,HB15_N,HB15_P,HB16_N,HB16_P,HB17_CC_N,HB17_CC_P,HB18_N,HB18_P,HB19_N,HB19_P,HB20_N,HB20_P,HB21_N,HB21_P
FMC_J1_JTAG=TCK,TDI,TDO,TMS,TRST_L
FMC_J1_LA=LA00_CC_N,LA00_CC_P,LA01_CC_N,LA01_CC_P,LA02_N,LA02_P,LA03_N,LA03_P,LA04_N,LA04_P,LA05_N,LA05_P,LA06_N,LA06_P,LA07_N,LA07_P,LA08_N,LA08_P,LA09_N,LA09_P,LA10_N,LA10_P,LA11_N,LA11_P,LA12_N,LA12_P,LA13_N,LA13_P,LA14_N,LA14_P,LA15_N,LA15_P,LA16_N,LA16_P,LA17_CC_N,LA17_CC_P,LA18_CC_N,LA18_CC_P,LA19_N,LA19_P,LA20_N,LA20_P,LA21_N,LA21_P,LA22_N,LA22_P,LA23_N,LA23_P,LA24_N,LA24_P,LA25_N,LA25_P,LA26_N,LA26_P,LA27_N,LA27_P,LA28_N,LA28_P,LA29_N,LA29_P,LA30_N,LA30_P,LA31_N,LA31_P,LA32_N,LA32_P,LA33_N,LA33_P
FMC_J1_POWER=3P3VAUX,12P0V,VIO_B_M2C
FMC_J1_VREF=VREF_A_M2C,VREF_B_M2C
GBT_CLOCK=GBTCLK0_M2C_N,GBTCLK0_M2C_P,GBTCLK1_M2C_N,GBTCLK1_M2C_P
I2C=SCL,SDA
MISC=PRSNT,PG_M2C,PG_C2M
PCB_uTCA_FMC_Carrier v4/FPGA.Harness 0 → 100644
View file @ 3c073a9a
FPGA_FLASH=FLASH_SI/D0,FLASH_Q/D1,FLASH_D2,FLASH_D3,FLASH_FCS_B\
FPGA_THERM=DXN,DXP
Helper_I2C=SDA,SCL,OE
JTAG=TCK,TDI,TDO,TMS,TRSTn
PORT3=Rx3_P,Rx3_N,Tx3_N,Tx3_P
SPI=SCK1,SSEL1,MISO1,MOSI1,PROGRAM_B,DONE,INIT_B,FLASH_Q/D1,FLASH_SI/D0,FPGA_CCLK,FCS_B\,FLASH_CS_MUX
UART=RxD,TxD
PCB_uTCA_FMC_Carrier v4/FPGA_MGT.Harness 0 → 100644
View file @ 3c073a9a
AMC_P2P=Rx12_N,Rx12_P,Tx12_N,Tx12_P,Rx13_N,Rx13_P,Tx13_N,Tx13_P,Rx14_N,Rx14_P,Tx14_N,Tx14_P,Rx15_N,Rx15_P,Tx15_N,Tx15_P
CLK_DIFF=CLK_P,CLK_N
FAT_PIPE1=Rx4_P,Rx4_N,Tx4_N,Tx4_P,Rx5_P,Rx5_N,Tx5_N,Tx5_P,Rx6_P,Rx6_N,Tx6_N,Tx6_P,Rx7_P,Rx7_N,Tx7_N,Tx7_P
FAT_PIPE2=Rx8_P,Rx8_N,Tx8_N,Tx8_P,Rx9_P,Rx9_N,Tx9_N,Tx9_P,Rx10_P,Rx10_N,Tx10_N,Tx10_P,Rx11_P,Rx11_N,Tx11_N,Tx11_P
FMC_J1_DP=DP0_C2M_N,DP0_C2M_P,DP1_C2M_N,DP1_C2M_P,DP2_C2M_N,DP2_C2M_P,DP3_C2M_N,DP3_C2M_P,DP0_M2C_N,DP0_M2C_P,DP1_M2C_N,DP1_M2C_P,DP2_M2C_N,DP2_M2C_P,DP3_M2C_N,DP3_M2C_P
GBT_CLOCK=GBTCLK0_M2C_N,GBTCLK0_M2C_P,GBTCLK1_M2C_N,GBTCLK1_M2C_P
MGT_CLK=PCIE_CLK1_P,PCIE_CLK1_N,PCIE_CLK2_P,FP2_CLK2_N,FP2_CLK1_P,FP2_CLK1_N,LINK01_CLK_P,LINK01_CLK_N,LINK23_CLK_P,LINK23_CLK_N
PORT0=Rx0_P,Rx0_N,Tx0_N,Tx0_P
PORT1=Rx1_P,Rx1_N,Tx1_N,Tx1_P
PORT2=Rx2_P,Rx2_N,Tx2_N,Tx2_P
PORT3=Rx3_P,Rx3_N,Tx3_N,Tx3_P
SFP_GTP=SFP1TX_N,SFP1TX_P,SFP1RX_N,SFP1RX_P,SFP2TX_N,SFP2TX_P,SFP2RX_N,SFP2RX_P,SFP3TX_N,SFP3TX_P,SFP3RX_N,SFP3RX_P,SFP4TX_N,SFP4TX_P,SFP4RX_N,SFP4RX_P,SFP5TX_N,SFP5TX_P,SFP5RX_N,SFP5RX_P,SFP6TX_N,SFP6TX_P,SFP6RX_N,SFP6RX_P,SFP7TX_N,SFP7TX_P,SFP7RX_N,SFP7RX_P,SFP8TX_N,SFP8TX_P,SFP8RX_N,SFP8RX_P
PCB_uTCA_FMC_Carrier v4/FPGA_SDRAM.Harness 0 → 100644
View file @ 3c073a9a
DDR=DQS0_P,DQS0_N,DQS1_P,DQS1_N,DQS2_P,DQS2_N,DQS3_P,DQS3_N,CLK0_N,CLK0_P,RST_N,ODT0,CE0_N,BA0,BA1,BA2,A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14,A15,CAS_N,RAS_N,WE_N,CKE0,DQM0,D0,D1,D2,D3,D4,D5,D6,D7,DQM1,D8,D9,D10,D11,D12,D13,D14,D15,DQM2,D16,D17,D18,D19,D20,D21,D22,D23,DQM3,D24,D25,D26,D27,D28,D29,D30,D31
FPGA_SDRAM_CLK=FPGA_CLK1_N,FPGA_CLK1_P,BOOT_CLK_IN
MLVDS-FPGA=IO_TX_P17,IO_TX_P18,IO_TX_P19,IO_TX_P20,IO_RX_P17,IO_RX_P18,IO_RX_P19,IO_RX_P20,R\E\_DE_TX_P17,R\E\_DE_TX_P18,R\E\_DE_TX_P19,R\E\_DE_TX_P20,R\E\_DE_RX_P17,R\E\_DE_RX_P18,R\E\_DE_RX_P19,R\E\_DE_RX_P20
PCB_uTCA_FMC_Carrier v4/JTAG_Configuration.Harness 0 → 100644
View file @ 3c073a9a
AMC_JTAG=TRST#,TMS,TDO,TDI,TCK
JTAG=TCK,TDI,TDO,TMS,TRSTn
USB_JTAG=USB_TCK,USB_TDI,USB_TDO,USB_TMS,EN_USB_JTAG,USB_JTAG_ACTIVE
PCB_uTCA_FMC_Carrier v4/M-LVDS PHY.Harness 0 → 100644
View file @ 3c073a9a
MLVDS=Rx17_P,Rx17_N,Tx17_N,Tx17_P,Rx18_P,Rx18_N,Tx18_N,Tx18_P,Rx19_P,Rx19_N,Tx19_N,Tx19_P,Rx20_P,Rx20_N,Tx20_N,Tx20_P
MLVDS-FPGA=IO_TX_P17,IO_TX_P18,IO_TX_P19,IO_TX_P20,IO_RX_P17,IO_RX_P18,IO_RX_P19,IO_RX_P20,R\E\_DE_TX_P17,R\E\_DE_TX_P18,R\E\_DE_TX_P19,R\E\_DE_TX_P20,R\E\_DE_RX_P17,R\E\_DE_RX_P18,R\E\_DE_RX_P19,R\E\_DE_RX_P20
PCB_uTCA_FMC_Carrier v4/POWER_Management.Harness 0 → 100644
View file @ 3c073a9a
FMC_J1_POWER=3P3VAUX,12P0V,VIO_B_M2C
PM_control=EN_RTM_MP,1V5_VTT_EN,EN_P1V8,EN_P1V2,EN_FMC1_P12V,EN_FMC2_P12V,EN_FMC1_PVADJ,EN_FMC2_PVADJ,EN_FMC1_P3V3,EN_FMC2_P3V3,DAC_VADJ_CSn,DAC_VADJ_SDI,DAC_VADJ_CLK,DAC_VADJ_RSTn,EN_P1V0,PGOOD_P1V0,EN_P3V3,EN_RTM_PWR
PCB_uTCA_FMC_Carrier v4/RTM_CON.Harness 0 → 100644
View file @ 3c073a9a
CLK_DIFF=CLK_N,CLK_P
I2C=SCL,SDA
JTAG=TCK,TDI,TDO,TMS,TRSTn
RTM=P31_IO10_AB_B3_CC_N,P31_IO10_AB_B3_CC_P,P31_IO9_AB_B3_CC_N,P31_IO9_AB_B3_CC_P,P31_IO2_CD_B2_N,P31_IO2_CD_B2_P,P31_IO1_CD_B2_N,P31_IO1_CD_B2_P,P31_IO4_AB_B2_N,P31_IO4_AB_B2_P,P31_IO3_AB_B2_N,P31_IO3_AB_B2_P,P31_IO2_AB_B2_N,P31_IO2_AB_B2_P,P31_IO1_AB_B2_N,P31_IO1_AB_B2_P,P31_IO2_EF_B2_N,P31_IO2_EF_B2_P,P31_IO1_EF_B2_N,P31_IO1_EF_B2_P,P30_IO10_EF_B2_N,P30_IO10_EF_B2_P,P30_IO9_EF_B2_N,P30_IO9_EF_B2_P,P30_IO10_CD_B2_N,P30_IO10_CD_B2_P,P30_IO9_CD_B2_N,P30_IO9_CD_B2_P,P30_IO10_AB_B2_CC_N,P30_IO10_AB_B2_CC_P,P30_IO9_AB_B2_CC_N,P30_IO9_AB_B2_CC_P,P30_IO8_EF_B1_N,P30_IO8_EF_B1_P,P30_IO7_EF_B1_N,P30_IO7_EF_B1_P,P30_IO6_EF_B1_N,P30_IO6_EF_B1_P,P30_IO5_EF_B1_N,P30_IO5_EF_B1_P,P30_IO8_CD_B1_N,P30_IO8_CD_B1_P,P30_IO7_CD_B1_N,P30_IO7_CD_B1_P,P30_IO6_CD_B1_N,P30_IO6_CD_B1_P,P30_IO5_CD_B1_N,P30_IO5_CD_B1_P,P30_IO8_AB_B1_N,P30_IO8_AB_B1_P,P30_IO7_AB_B1_N,P30_IO7_AB_B1_P,P30_IO6_AB_B1_CC_N,P30_IO6_AB_B1_CC_P,P30_IO5_AB_B1_CC_N,P30_IO5_AB_B1_CC_P,P30_OUT2_N,P30_OUT2_P,P30_OUT1_N,P30_OUT1_P,P30_OUT0_N,P30_OUT0_P
RTM_CLK=AMC_TCLK_P,AMC_TCLK_N,GTP03_P,GTP03_N,GTP47_P,GTP47_N
SFP_GTP=SFP1TX_N,SFP1TX_P,SFP1RX_N,SFP1RX_P,SFP2TX_N,SFP2TX_P,SFP2RX_N,SFP2RX_P,SFP3TX_N,SFP3TX_P,SFP3RX_N,SFP3RX_P,SFP4TX_N,SFP4TX_P,SFP4RX_N,SFP4RX_P,SFP5TX_N,SFP5TX_P,SFP5RX_N,SFP5RX_P,SFP6TX_N,SFP6TX_P,SFP6RX_N,SFP6RX_P,SFP7TX_N,SFP7TX_P,SFP7RX_N,SFP7RX_P,SFP8TX_N,SFP8TX_P,SFP8RX_N,SFP8RX_P
PCB_uTCA_FMC_Carrier v4/SDRAM.Harness 0 → 100644
View file @ 3c073a9a
DDR=DQM0,DQM1,DQM2,DQM3,DQS0_P,DQS0_N,DQS1_P,DQS1_N,DQS2_P,DQS2_N,DQS3_P,DQS3_N,CE0_N,BA0,BA1,BA2,A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14,A15,CAS_N,RAS_N,WE_N,CKE0,D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15,D16,D17,D18,D19,D20,D21,D22,D23,D24,D25,D26,D27,D28,D29,D30,D31,ODT0,RST_N,CLK0_N,CLK0_P
PCB_uTCA_FMC_Carrier v4/UI_mon.Harness 0 → 100644
View file @ 3c073a9a
I2C=SDA,SCL
P_MON=P_PV_TC,P_WARNING,P_CRITICAL
PCB_uTCA_FMC_Carrier v4/USB_SERIAL_QUAD.Harness 0 → 100644
View file @ 3c073a9a
UART=RxD,TxD
USB_JTAG=USB_TDI,USB_TCK,USB_TMS,USB_TDO,USB_JTAG_ACTIVE,EN_USB_JTAG
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