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Last edited by Vasco Guita

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AMC FMC Carrier (AFC)

Project description

The AMC FMC carrier is partially based on SPEC (supply, WR clocks) design. It was primarily specified by the Brazilian Synchrotron Light Laboratory (LNLS) and designed by Warsaw University of Technology (WUT) to support quad 16-bit ADC FMC boards for Sirius BPM electronics. Among many features, the card has very flexible clock circuit that enables any clock source to be connected to any clock input, including telecom clock, FMC clocks and FPGA.

AFC production board - (Top view, Bottom view)

Functional specifications

  • Xilinx Artix-7 200T FFG1156 FPGA (XC7A200T-3FFG1156E)
  • 2 GB DDR3 SDRAM (32-bit interface)
  • 2 high pin count (HPC) slots for 2 single width mezzanines or 1 double width mezzanine
  • SPI Flash for FPGA configuration
  • SPI Flash for user data storage
  • JTAG multiplexer (SCANSTA) for FMC access
  • Power supply for FPGA, memory, FMCs - programmable VADJ 1.8-3.3V
  • Clock distribution circuit compatible with WR
  • Temperature, voltage and current monitoring for critical power buses
  • Stand-alone power connector
  • Mini-USB connected to the IPMI processor
  • SATA connector for Port2, Port3 with possibility of switching to FPGA MGT
  • MGT connected to FMC1, FMC2, Fat Pipe 1, Fat Pipe 2 (optional), Port0, Port1, Port2 (optional), Port3 (optional), RTM (optional)
  • EEPROM with MAC and unique ID
  • RTM connector with 8 GTP routed to it. Compatible with rtm-sfp8 module.

Detailed project information

  • Documentation:

Contacts

Commercial producers

General question about project

Project status

Date Event
23-07-2012 Digital back-end for Sirus BPM schematics started. Creotech is in charge of the boards design.
12-09-2012 First version of schematics pushed to the repository.
24-09-2012 Proposal for cooling, carrier and backplane components placement.
09-11-2012 Project redefinition: backplane and enclosure will use MicroTCA.4 COTS hardware.
The FPGA board should be an AMC board compliant with MTCA.4.
1-04-2013 PCB finished.
29-04-2013 PCB assembled, still waiting for panels from ELMA.
29-05-2013 PCIe works, SDRAM works, clocks work.
8-09-2013 Next production batch (10 pieces) of the board started. Applied several cosmetic changes
but 100% backward compatibility is preserved.
01-10-2013 Batch of 10 pcbs delivered
01-11-2013 All boards up and running
20-03-2014 Version 3 with RTM ready for production
10-04-2014 7 pieces produced
17-05-2014 PTS finished
20-05-2014 Tests finished. 6.5 Gbit/s operation verified with RTM-SFP-8

Filip Świtakowski - 29 Jan 2015