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<!---->
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**AFC production board** - ([Top
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view](https://www.ohwr.org/project/afc/uploads/28ef8b39ac0952926931bef84a25d8d5/AFC_TOP_v3_1.JPG), [Bottom
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... | ... | @@ -23,25 +25,41 @@ view](https://www.ohwr.org/project/afc/uploads/5372faa7cec5cbc101eb8f5c0f0cfa8a/ |
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## Functional specifications
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- Xilinx Artix-7 200T FFG1156 FPGA (XC7A200T-3FFG1156E)
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- 2 GB DDR3 SDRAM (32-bit interface)
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- 2 high pin count (HPC) slots for 2 single width mezzanines or 1
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double width mezzanine
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- SPI Flash for FPGA configuration
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- SPI Flash for user data storage
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- JTAG multiplexer (SCANSTA) for FMC access
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- Power supply for FPGA, memory, FMCs - programmable VADJ 1.8-3.3V
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- Clock distribution circuit compatible with WR
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- Temperature, voltage and current monitoring for critical power buses
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- Stand-alone power connector
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- Mini-USB connected to the IPMI processor
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- SATA connector for Port2, Port3 with possibility of switching to
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FPGA MGT
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- MGT connected to FMC1, FMC2, Fat Pipe 1, Fat Pipe 2 (optional),
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Port0, Port1, Port2 (optional), Port3 (optional), RTM (optional)
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- EEPROM with MAC and unique ID
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- RTM connector with 8 GTP routed to it. Compatible with rtm-sfp8
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module.
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- **Programmable resources:**
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- Xilinx Artix-7 200T FFG1156 FPGA (XC7A200T-3FFG1156C)
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- MMC: LPC1768
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<!-- end list -->
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- **Memory:**
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- 2 GB DDR3 SDRAM (32-bit interface), 800Mhz
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- SPI Flash for FPGA configuration
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- EEPROM with MAC and unique ID
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<!-- end list -->
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- **Connectivity:**
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- 2 high pin count (HPC) slots for 2 single width mezzanines or 1
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double width mezzanine
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- Micro-USB connected to IPMI and FPGA
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- MGT can be connected to FMC1, FMC2, Fat Pipe 1, Fat Pipe 2,
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Port0, Port1, Port2, Port3, RTM
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- RTM connector with 8 GTP routed to it. Compatible with RTM-4SFP-3QSFP module.
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<!-- end list -->
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- **Supply:**
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- Power supply for FPGA, memory, FMCs - programmable VADJ 1.8-3.3V
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(independent for each FMC)
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- Voltage and current monitoring for all FMC power buses
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<!-- end list -->
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- **Other:**
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- Clock distribution circuit compatible with White Rabbit and ARTIQ
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- Temperature monitoring: FMC1, FMC2, supply, FPGA core, DDR
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memory
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- JTAG access to FMC and RTM
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-----
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... | ... | @@ -49,9 +67,9 @@ view](https://www.ohwr.org/project/afc/uploads/5372faa7cec5cbc101eb8f5c0f0cfa8a/ |
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- Documentation:
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- Schematics
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([PDF](https://www.ohwr.org/project/afc/tree/master/))
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([PDF](https://ohwr.org/project/afc/tree/cti_afc4/documentation/Schematic%20Print))
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- PCB
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([PDF](https://www.ohwr.org/project/afc/tree/master/))
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([PDF](https://ohwr.org/project/afc/blob/cti_afc4/documentation/PCB%20Print/AFCv4.0.2.PDF))
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<!-- end list -->
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... | ... | @@ -64,7 +82,7 @@ view](https://www.ohwr.org/project/afc/uploads/5372faa7cec5cbc101eb8f5c0f0cfa8a/ |
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### Commercial producers
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- [AMC FMC Carrier – AFC](http://creotech.pl/product-scientific/amc-fmc-carrier-afc) - [Creotech](http://creotech.pl), Poland
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- [AMC FMC Carrier – AFC](https://creotech.pl/product/amc-fmc-carrier-afc-v4/) - [Creotech](http://creotech.pl), Poland
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### General question about project
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... | ... | @@ -97,6 +115,6 @@ view](https://www.ohwr.org/project/afc/uploads/5372faa7cec5cbc101eb8f5c0f0cfa8a/ |
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-----
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Filip Świtakowski - 30 April 2021
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Filip Świtakowski - 03 Sep 2021
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