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Commit a3d66a92 authored by Aylons's avatar Aylons
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Corrected TCLKA_CIN via connection south of IC8

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circuit_board/AMC_FMC_Carrier.PcbDoc
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circuit_board/AMC_FMC_Carrier.PrjPcbStructure 0 → 100644
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Record=TopLevelDocument|FileName=AMC_FMC_Carrier.SchDoc
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=AMC_CON|SchDesignator=AMC_CON|FileName=AMC_Connector.SchDoc|SymbolType=Normal|RawFileName=AMC_Connector.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=ASATA|SchDesignator=ASATA|FileName=AMC-SATA.SchDoc|SymbolType=Normal|RawFileName=AMC-SATA.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=CLK_MGT|SchDesignator=CLK_MGT|FileName=Clock_management.SchDoc|SymbolType=Normal|RawFileName=Clock_management.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=FPGA|SchDesignator=FPGA|FileName=FPGA.SchDoc|SymbolType=Normal|RawFileName=FPGA.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=HeightUnderFMC|SchDesignator=HeightUnderFMC|FileName=HeightRuleRoom1.9mm.SchDoc|SymbolType=Normal|RawFileName=HeightRuleRoom1.9mm.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=HPC1|SchDesignator=HPC1|FileName=FMC_connector.SchDoc|SymbolType=Normal|RawFileName=FMC_connector.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=HPC2|SchDesignator=HPC2|FileName=FMC_connector.SchDoc|SymbolType=Normal|RawFileName=FMC_connector.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=IPMI|SchDesignator=IPMI|FileName=IPMI.SchDoc|SymbolType=Normal|RawFileName=IPMI.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=JTAG_CONF|SchDesignator=JTAG_CONF|FileName=JTAG_Configuration.schdoc|SymbolType=Normal|RawFileName=JTAG_Configuration.schdoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=LVDS_PHY|SchDesignator=LVDS_PHY|FileName=M-LVDS PHY.SchDoc|SymbolType=Normal|RawFileName=M-LVDS PHY.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=PWR_MGT|SchDesignator=PWR_MGT|FileName=POWER_Management.SchDoc|SymbolType=Normal|RawFileName=POWER_Management.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=RTM_CON|SchDesignator=RTM_CON|FileName=RTM_CON.SchDoc|SymbolType=Normal|RawFileName=RTM_CON.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=SDRAM|SchDesignator=SDRAM|FileName=SDRAM.SchDoc|SymbolType=Normal|RawFileName=SDRAM.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier.SchDoc|Designator=UUART|SchDesignator=UUART|FileName=USB_UART.SchDoc|SymbolType=Normal|RawFileName=USB_UART.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier_block.SchDoc|Designator=AMC_CON|SchDesignator=AMC_CON|FileName=AMC_Connector.SchDoc|SymbolType=Normal|RawFileName=AMC_Connector.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier_block.SchDoc|Designator=ASATA|SchDesignator=ASATA|FileName=AMC-SATA.SchDoc|SymbolType=Normal|RawFileName=AMC-SATA.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier_block.SchDoc|Designator=CLK_CROSSBAR|SchDesignator=CLK_CROSSBAR|FileName=Clock_management.SchDoc|SymbolType=Normal|RawFileName=Clock_management.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier_block.SchDoc|Designator=FPGA|SchDesignator=FPGA|FileName=FPGA.SchDoc|SymbolType=Normal|RawFileName=FPGA.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier_block.SchDoc|Designator=HPC1|SchDesignator=HPC1|FileName=FMC_connector.SchDoc|SymbolType=Normal|RawFileName=FMC_connector.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier_block.SchDoc|Designator=HPC2|SchDesignator=HPC2|FileName=FMC_connector.SchDoc|SymbolType=Normal|RawFileName=FMC_connector.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier_block.SchDoc|Designator=IPMI|SchDesignator=IPMI|FileName=IPMI.SchDoc|SymbolType=Normal|RawFileName=IPMI.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier_block.SchDoc|Designator=JTAG_CONF|SchDesignator=JTAG_CONF|FileName=JTAG_Configuration.schdoc|SymbolType=Normal|RawFileName=JTAG_Configuration.schdoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier_block.SchDoc|Designator=LVDS_PHY|SchDesignator=LVDS_PHY|FileName=M-LVDS PHY.SchDoc|SymbolType=Normal|RawFileName=M-LVDS PHY.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier_block.SchDoc|Designator=PWR_MGT|SchDesignator=PWR_MGT|FileName=POWER_Management.SchDoc|SymbolType=Normal|RawFileName=POWER_Management.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=AMC_FMC_Carrier_block.SchDoc|Designator=SDRAM|SchDesignator=SDRAM|FileName=SDRAM.SchDoc|SymbolType=Normal|RawFileName=SDRAM.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Clock_management.SchDoc|Designator=CLK_WR|SchDesignator=CLK_WR|FileName=Clock_WR.SchDoc|SymbolType=Normal|RawFileName=Clock_WR.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Clock_management.SchDoc|Designator=FCLK|SchDesignator=FCLK|FileName=FMC_Clocks.SchDoc|SymbolType=Normal|RawFileName=FMC_Clocks.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Clock_management.SchDoc|Designator=U_Low_jitter_CLK_bypass|SchDesignator=U_Low_jitter_CLK_bypass|FileName=Low_jitter_CLK_bypass.SchDoc|SymbolType=Normal|RawFileName=Low_jitter_CLK_bypass.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FHPC1|SchDesignator=FHPC1|FileName=FMC_HPC1.SchDoc|SymbolType=Normal|RawFileName=FMC_HPC1.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FHPC2|SchDesignator=FHPC2|FileName=FMC_HPC2.SchDoc|SymbolType=Normal|RawFileName=FMC_HPC2.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FMGT|SchDesignator=FMGT|FileName=FPGA_MGT.SchDoc|SymbolType=Normal|RawFileName=FPGA_MGT.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FPGA_SUP|SchDesignator=FPGA_SUP|FileName=FPGA_SUP.SchDoc|SymbolType=Normal|RawFileName=FPGA_SUP.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=FPGA.SchDoc|Designator=FSDRAM|SchDesignator=FSDRAM|FileName=FPGA_SDRAM.SchDoc|SymbolType=Normal|RawFileName=FPGA_SDRAM.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=IPMI.SchDoc|Designator=CPU|SchDesignator=CPU|FileName=CPU.SchDoc|SymbolType=Normal|RawFileName=CPU.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=IPMI.SchDoc|Designator=RTCE|SchDesignator=RTCE|FileName=RTCE.SchDoc|SymbolType=Normal|RawFileName=RTCE.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=IPMI.SchDoc|Designator=THERMO|SchDesignator=THERMO|FileName=Thermometers.SchDoc|SymbolType=Normal|RawFileName=Thermometers.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=IPMI.SchDoc|Designator=UUART|SchDesignator=UUART|FileName=USB_UART.SchDoc|SymbolType=Normal|RawFileName=USB_UART.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Power_Management.SchDoc|Designator=SUP_10|SchDesignator=SUP_10|FileName=SUP_1V.SchDoc|SymbolType=Normal|RawFileName=SUP_1V.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Power_Management.SchDoc|Designator=SUP_12_18|SchDesignator=SUP_12_18|FileName=SUP_1.2_1.8.SchDoc|SymbolType=Normal|RawFileName=SUP_1.2_1.8.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Power_Management.SchDoc|Designator=SUP_15|SchDesignator=SUP_15|FileName=SUP_1.5_3.3.SchDoc|SymbolType=Normal|RawFileName=SUP_1.5_3.3.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Power_Management.SchDoc|Designator=SUP_HPC25|SchDesignator=SUP_HPC25|FileName=SUP_2.5_FMC.SchDoc|SymbolType=Normal|RawFileName=SUP_2.5_FMC.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Power_Management.SchDoc|Designator=SUP_HPC33|SchDesignator=SUP_HPC33|FileName=SUP_3.3_FMC.SchDoc|SymbolType=Normal|RawFileName=SUP_3.3_FMC.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
Record=SheetSymbol|SourceDocument=Power_Management.SchDoc|Designator=UI|SchDesignator=UI|FileName=UI_mon.SchDoc|SymbolType=Normal|RawFileName=UI_mon.SchDoc|DesignItemId= |SourceLibraryName= |ObjectKind=Sheet Symbol|RevisionGUID= |ItemGUID= |VaultGUID=
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