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Created with Raphaël 2.2.02Oct23Sep24Jul3Feb29Jul23Feb225Jan25Nov181343Update .ohwr.yamlmastermasterUpdate .ohwr.yamlAdd .ohwr.yamlupdate: change BISSC master interframe gap delay to 15usfix: EnDAT master sampling edgedoc: EnDAT performancesfix, add: simplify HSSL reader, add minial simulationupdate: HSSL reader refsdoc: HSSLadd: HSSL reader (Attocube IDS3010 realtime outputs)fix: one more tick master clock frequency issuehdl, absenc: BISS master waits for start bitfix: check data_len to fix questasim failurefix: check data_len to fix questasim failurefix: check data_len to fix questasim failureadd: vcom compilation scriptfix: use range instead of others for unconstrainted types allows vcom to compiledoc: add READMEadd doc, sim, src