rtl: moved full mezzanine wrapper code & direct readout module to the core sources directory
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- hdl/rtl/fmc_tdc_direct_readout.vhd 0 additions, 0 deletionshdl/rtl/fmc_tdc_direct_readout.vhd
- hdl/rtl/fmc_tdc_direct_readout_slave.vhd 0 additions, 0 deletionshdl/rtl/fmc_tdc_direct_readout_slave.vhd
- hdl/rtl/fmc_tdc_direct_readout_slave_pkg.vhd 0 additions, 0 deletionshdl/rtl/fmc_tdc_direct_readout_slave_pkg.vhd
- hdl/rtl/fmc_tdc_wrapper.vhd 0 additions, 0 deletionshdl/rtl/fmc_tdc_wrapper.vhd
- hdl/rtl/tdc_core_pkg.vhd 0 additions, 0 deletionshdl/rtl/tdc_core_pkg.vhd
- hdl/rtl/wbgen/fmc_tdc_direct_readout_slave.wb 0 additions, 0 deletionshdl/rtl/wbgen/fmc_tdc_direct_readout_slave.wb
- hdl/sim-old/spec/data_vectors/acam_test_cmd0.vec 0 additions, 0 deletionshdl/sim-old/spec/data_vectors/acam_test_cmd0.vec
- hdl/sim-old/spec/data_vectors/atdc_test_cmd0.vec 0 additions, 0 deletionshdl/sim-old/spec/data_vectors/atdc_test_cmd0.vec
- hdl/sim-old/spec/data_vectors/memo_test_cmd0.vec 0 additions, 0 deletionshdl/sim-old/spec/data_vectors/memo_test_cmd0.vec
- hdl/sim-old/spec/data_vectors/pulses.txt 0 additions, 0 deletionshdl/sim-old/spec/data_vectors/pulses.txt
- hdl/sim-old/spec/spec_fmc_tdc_sim.xise 0 additions, 0 deletionshdl/sim-old/spec/spec_fmc_tdc_sim.xise
- hdl/sim-old/spec/testbench/acam_data_model.vhd 0 additions, 0 deletionshdl/sim-old/spec/testbench/acam_data_model.vhd
- hdl/sim-old/spec/testbench/acam_fifo_model.vhd 0 additions, 0 deletionshdl/sim-old/spec/testbench/acam_fifo_model.vhd
- hdl/sim-old/spec/testbench/acam_model.vhd 0 additions, 0 deletionshdl/sim-old/spec/testbench/acam_model.vhd
- hdl/sim-old/spec/testbench/acam_timing_model.vhd 0 additions, 0 deletionshdl/sim-old/spec/testbench/acam_timing_model.vhd
- hdl/sim-old/spec/testbench/gnum_model/cmd_router.vhd 0 additions, 0 deletionshdl/sim-old/spec/testbench/gnum_model/cmd_router.vhd
- hdl/sim-old/spec/testbench/gnum_model/cmd_router1.vhd 0 additions, 0 deletionshdl/sim-old/spec/testbench/gnum_model/cmd_router1.vhd
- hdl/sim-old/spec/testbench/gnum_model/gennum_tb.tar 0 additions, 0 deletionshdl/sim-old/spec/testbench/gnum_model/gennum_tb.tar
- hdl/sim-old/spec/testbench/gnum_model/gn412x_bfm.vhd 0 additions, 0 deletionshdl/sim-old/spec/testbench/gnum_model/gn412x_bfm.vhd
- hdl/sim-old/spec/testbench/gnum_model/mem_model.vhd 0 additions, 0 deletionshdl/sim-old/spec/testbench/gnum_model/mem_model.vhd
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