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This is an archived project. Repository and other project resources are read-only.
fmc-projects
fmc-tdc
fmc-tdc-1ns-5cha-gw
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proposed_master
1dda0aa5
·
Add build_wbgen.sh script.
·
Oct 16, 2018
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tom-sep21
b69e7d0c
·
top/spec: enable FIFO readout following addition of the corresponding generic
·
Sep 21, 2018
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tom-tmp-sep17
abad9a6f
·
hdl: post-merge fixes, brought back direct readout interface
·
Sep 17, 2018
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tom-sep16
06215726
·
updated submodules
·
Sep 17, 2018
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tom-sep11
ea9db60d
·
syn/spec: updated ISE project
·
Sep 11, 2018
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tom-arith-fix-sep07
4bbd2889
·
fmc_tdc_core: fix 131us timestamp error
·
Sep 07, 2018
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tom-dma-sep04
2b303836
·
ip_cores: updated general-cores to latest version
·
Sep 03, 2018
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tom-dma-aug31
b8c763a1
·
spec: removed debugging ports from the gennum core
·
Aug 31, 2018
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tom-dma-aug06
6b2e87d4
·
spec: use FmcAdc's DMA EIC as an interrupt adapter between GN4124 core and the VIC
·
Aug 09, 2018
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tom-dma-jul22
1e1a8a0a
·
Initial version of DMA SPEC gateware, briefly validated in HW
·
Jul 23, 2018
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master
default
b10c63a4
·
Merge branch 'greg-wrpc-v4.2'
·
Dec 19, 2017
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tom-fifo-readout
0d812061
·
fmc_tdc_mezzanine: forgot to re-connect direct timestamp output after implementing FIFO readout
·
May 12, 2015
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tom-debug-clk-trans
1eb8f326
·
wip
·
Apr 07, 2015
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tom-fix-clock-crossing
32fba6fc
·
removed unnecessary signal
·
Mar 20, 2015
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