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A Precise Time Protocol (PTP, IEEE 1588) software stack whose single source code can be compiled for many architectures (POSIX systems, WR switch, WR node, ...) and which is easily extensible.

Introductory SoC course with reference designs based on the Xilinx Vitis Unified Software Development Platform and targeted to the Xilinx Zynq UltraScale+ MPSoC. More info at the Wiki page

This project covers the hardware development of version 4 of the White Rabbit switch (WRS-v4). More info at the Wiki page

Development of software for the White Rabbit switch, and in particular the embedded Linux system running in the ARM9 processor. More info at the Wiki page

White Rabbit Switch WRS-3/18 (hardware version 3.4) with the low-jitter daughterboard integrated. More info at the Wiki page

Tool for generating multi-purpose makefiles for FPGA projects.

Main features:

makefile generation for: fetching modules from repositories simulating HDL projects synthesizing HDL projects synthesizing projects remotely (keeping your local resources free) generating multi-vendor project files (no clicking in the IDE!) many other things without involving make and makefiles

Hdlmake supports modularity, scalability, revision control systems. Hdlmake can be run on any Linux or Windows machine with any HDL More info at the Wiki page

Gateware and software for the data acquisition path of the FSI project

A board that has eyes

The Analogue GIRAPH is an active 19" patch panel that provides 32 single ended or 16 diff. analogue inputs and 8 channels single-ended analogue output. More info at the Wiki page

A White Rabbit Timing Receiver in PCIe (PCI Express) format. More info at the Wiki page

DI/OT Peripheral Board Loop-back. More info at the Wiki page

A simple optical to TTL electrical converter. More info at the Wiki page

A simple TTL electrical to optical converter. More info at the Wiki page

A collection of cores needed in the White Rabbit node and switch. Includes White Rabbit PTP Core (WRPC).

Collection of WRTD reference designs provided by (and used at) CERN

WorldFIP is a deterministic rad-tol fieldbus used at CERN's LHC for a variety of control systems. Cryogenics, Power Converters, Beam Instrumentation and other critical systems are using WorldFIP for the exchange of data between their sensors and actuators and the control and supervision level. With Alstom phasing out WorldFIP support in 2009, it was decided to insource this technology at CERN.

The PFC is a 4-lane PCIe carrier for a single VITA 57 (FMC) mezzanine. It has many memory and clocking resources and supports the White Rabbit timing and control network. For more details please refer to the Wiki pages. *Warning. This project is on hold. Refer to the SPEC*

The VFC is a VME carrier for two VITA 57 (FMC) mezzanines. For more details please refer to the wiki pages. Obsolete project. Replaced by VFC-HD.

FMC DAC 10M 16b 4cha: 16-bit 10Ms/s DAC card in FMC form-factor. Four channels with an output range of +/-10V. Three trigger inputs (start, pause and stop), common to the four outputs.

Cancelled project.