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hdl-core-lib / wr-cores / wrpc-sw
GNU General Public License v2.0 or laterREAD-ONLY PROJECT TO PRESERVE EXISTING REMOTE URLS
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FMC High Voltage supply capable of delivering positive or negative voltage (selectable by components assembly) with voltage and current monitoring. Features FMC LPC, 0.../- 6kV, up to 4W, Selectable range (/- 750V, /- 1.5kV,/- 3kV, /- 4.5kV,/- 6kV), Voltage and current measurement with hardware over-current protection, SHV output.
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pcie-fmc-soc-vdas is a PCIe carrier for a high pin count FPGA Mezzanine Card (VITA 57). The main component is a SOC chip used in cellular base stations that can do advanced processing. More info at the Wiki page
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Projects / LHC Instability Trigger Distribution LIST
GNU General Public License v3.0 onlyLIST is a trigger distribution system based on White Rabbit. It can receive a trigger from a “cloud” of devices and distribute it to all relevant devices to for example freeze their acquisition buffers. The latency between reception and transmission of a trigger is done with a low and notably fixed latency, with an accuracy of better than 1 ns. The hardware of the LIST nodes is based on the SVEC FMC carrier equipped with a FMC TDC mezzanine and a Fine Delay mezzanine. More info at the Wiki page
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The uTCA RTM 8 SFP is module equipped with 8 SFP cages and a clock distribution network. It is compatible with AFC and future projects such as Kintex-based AFC and WR MCH. The module is compliant with DESY RTM class D1.3
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Projects / AIDA-2020 TLU
OtherA Trigger/Timing Logic Unit designed for use with High Energy Physics beam-tests. Provides a simple and flexible interface for fast timing and triggering signals at the AIDA pixel sensor beam-telescope. Connects to a FPGA carrier card via a FMC connector.
( N.B. Use the sub-project Git repositories, not the top level repository )
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A level conversion board between TTL and 24V blocking levels in VME64x form factor. The project uses a rear transition module for connectivity and a front module with the active conversion and diagnostics electronics. More info at the Wiki page
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The Face Shield, made only for COVID-19 protection, can be worn directly or can be put on safety helmets. The FaceShield is developed under the CERN against COVID-19 program. More info at the Wiki page
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This library provides a generic API for ADC devices, so that applications can use this API to access any of the supported ADC boards. Currently the library supports the following boards:
fmc-adc-100m14b14chaFor testing and debugging purpose it supports also a couple of virtual boards that you can use to start the development of your application.
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READ-ONLY PROJECT TO PRESERVE EXISTING REMOTE URLS
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4-channel 16-bit 210 MS/s ADC (LTC2107) FMC module. More info at the Wiki page
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hdl-core-lib / pcie-vme-bridge
GNU General Public License v3.0 onlyREAD-ONLY PROJECT TO PRESERVE EXISTING REMOTE URLS
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A simple optical to TTL electrical converter. More info at the Wiki page
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Compact Universal Timing Endpoint Based on White Rabbit with Xilinx Artix7. Follow-up of the CUTE-WR-DP. More info at the Wiki page
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A Trigger/Timing Logic Unit to synchronize devices at beam test A successor to the AIDA(2020) TLU (https://ohwr.org/project/fmc-mtlu) This is an "umbrella" project with documentation, pointing to the projects with the hardware and firm(gate)ware
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Couples a MAROC ASIC (64 channels each with a fixed threshold discriminator and a slow shaper + sample-and-hold + 12-bit ADC) to a FPGA. Read-out by Gigabit Ethernet (firmware supplied supports IPBus). Multiple boards can be plugged together to increase the channel count. Clocking circuitry compatible with the White Rabbit implementation of PTP. More info at the Wiki page
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4-channel 16-bit 250 MS/s (700 MHz analog input bandwidth) ADC (ISLA216P25) FMC module.
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