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  • Configuration and boot software required to start up the SPEC7 board

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  • We have designed an FPGA Mezzanine card (standard FMC/Vita 57) for high-channel-count electrophysiology, with 128 channels (potentially up to 512), based upon Intan Tech's RHA2132 (2 uV rms input-referred noise), sampled at 25kHz 18bit by AD7982. We are basing our design on the reference design provided by Reid Harrison of Intan Tech for their 16-channel evaluation board. The expected cost of the device should be under 5000$.

    In order to have an integrated solution we intend to have as default carrier the Opal Kelly Shuttle LX1, an inexpensive USB FMC carrier with an excellent USB controller. The integrated solution will be completed with software on the PC side to grab to disk continuously and/or display in some fashion all 128 channels.

    Our status: We have an alpha card. It has passed most tests---we can grab from any channel at 1MS/s. We have an alpha microcode: it grabs from any channel and stores on the PC.

    Our current team: Marcelo Magnasco (Rockefeller University, New York), design. Andres Cicuttin (ICTP, Trieste), schematics + fpga Maria Liz Crespo (ICTP, Trieste), fpga Sanjee Abeytunge (MSKCC, New York) layout Nicholas Joseph (RU) Macintosh drivers

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  • Projects / Simple PCIe FMC carrier SPEC - Software

    GNU General Public License v2.0 or later

    Software support for the SPEC board, including kernel and user-space Linux code. The package also include the fmc-bus driver, which is expected to be used by other carriers as well.

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  • Projects / Beam Positoning Monitor - Software

    GNU General Public License v3.0 only

    Software for Beam Position Monitor, including digital signal processing chains, data acquisition engines, ADC and analog front-end peripherals control/monitoring, timing and control system interface.

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  • A low cost, low complexity FMC carrier based on Xilinx Artix-7

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  • Production and functional tests for PXIe controller COM Express based. More info at the Wiki page

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  • The robustness of a White Rabbit Network (WRN) is a broad subject covering methods (HW & SW) which enable to increase overall reliability of a WR-based system. This includes Forward Error Correction (FEC), Quality of Service (QoS) assurance, support of network redundancy, proper network design, thorough diagnostics, and increasing the reliability of network components (i.e. switches, nodes). Here, these methods are described and their implementation sources gathered.

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  • Tester board to test PXIe processor modules. Two variants: slot 2 and slot 10 (system timing slot). More info at the Wiki page

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  • A VHDL core for a PCI slave. The other side behaves like a Wishbone master.

    More info at the Wiki page
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  • A project to host all software and hardware developments related to testing the White Rabbit switch.

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  • This is a port of an older Linux ptpd to support White Rabbit extensions and run both in hosted and freestanding environment. In the future we plan to replace it with PPSI, which has a much better design, but ptp-noposix is currently working pretty well despite being difficult to maintain.

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  • EPICS support for Wishbone peripherals: This project consist of a Generic EPICS IOC AsynDriver to support wishbone peripheral. It include the following features:

    Driver for X1052, Gennum, Etherbone WB master. Direct access to any register in the wishbone bus Auto-generation of EPICS Database file using wbgen2 Automatic real number convertion (2 complements, fixed point, signess) using .wb file Support for WR Core and other internal bus protocols (i2c, spi, etc.)

    More info at the Wiki page

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  • A system to characterize large area silicon pad sensors with several hundred channels. This repository contains the microcontroller firmware.

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  • Etherbone is an FPGA-core that connects Ethernet to internal on-chip wishbone buses permitting any core to talk to any other across Ethernet.

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