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eurocard
euro-adc-65m-14b-40cha
euro-adc-65m-14b-40cha-gw
Commits
baaf2004
Commit
baaf2004
authored
Nov 22, 2017
by
Dan Saunders
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21 changed files
with
687 additions
and
673 deletions
+687
-673
sc_seq.xml
components/solid/addr_table/sc_seq.xml
+1
-1
sc_trig_link_pipe.vhd
components/solid/firmware/hdl/sc_trig_link_pipe.vhd
+11
-2
I2CuHal.py
components/solid/software/I2CuHal.py
+1
-1
payload.vhd
projects/64ch/firmware/hdl/payload.vhd
+1
-1
Si5345_status.py
projects/64ch/software/Si5345_status.py
+3
-3
adc_setup.py
projects/64ch/software/adc_setup.py
+28
-28
align_adc.py
projects/64ch/software/align_adc.py
+115
-109
align_adc_all.py
projects/64ch/software/align_adc_all.py
+102
-102
align_adc_bulk.py
projects/64ch/software/align_adc_bulk.py
+0
-176
align_adc_nofuckup.py
projects/64ch/software/align_adc_nofuckup.py
+105
-105
call_align_adc.py
projects/64ch/software/call_align_adc.py
+30
-0
connections.xml
projects/64ch/software/connections.xml
+19
-1
inspect_tapSlip_config.py
projects/64ch/software/inspect_tapSlip_config.py
+4
-6
ro_test.py
projects/64ch/software/ro_test.py
+113
-104
setup.py
projects/64ch/software/setup.py
+2
-6
setup_all.py
projects/64ch/software/setup_all.py
+1
-1
setup_orig.py
projects/64ch/software/setup_orig.py
+1
-1
spi_test.py
projects/64ch/software/spi_test.py
+24
-24
test_adc.py
projects/64ch/software/test_adc.py
+126
-0
test_links.py
projects/64ch/software/test_links.py
+0
-1
test_links_sim.py
projects/64ch/software/test_links_sim.py
+0
-1
No files found.
components/solid/addr_table/sc_seq.xml
View file @
baaf2004
<node
id=
"seq"
address=
"0x8"
description=
"readout sequencer"
fwinfo=
"endpoint"
>
<node
id=
"seq"
description=
"readout sequencer"
fwinfo=
"endpoint"
>
<node
id=
"buf"
address=
"0x0"
description=
"sequence buffer"
fwinfo=
"endpoint;width=1"
>
<node
id=
"addr"
address=
"0x0"
/>
<node
id=
"data"
address=
"0x1"
mode=
"port"
/>
...
...
components/solid/firmware/hdl/sc_trig_link_pipe.vhd
View file @
baaf2004
...
...
@@ -180,7 +180,16 @@ begin
end
process
;
-- Remote link ID
remote_id
<=
rxd
(
7
downto
0
)
when
rising_edge
(
clk125
)
and
rxk
=
"10"
and
link_good
=
'1'
;
process
(
clk125
)
begin
if
rising_edge
(
clk125
)
then
if
en
=
'0'
or
link_good
=
'0'
then
remote_id
<=
(
others
=>
'0'
);
elsif
rxk
=
"10"
then
remote_id
<=
rxd
(
7
downto
0
);
end
if
;
end
if
;
end
process
;
end
rtl
;
components/solid/software/I2CuHal.py
View file @
baaf2004
...
...
@@ -175,7 +175,7 @@ class I2CCore:
self
.
cmd_stat
.
write
(
I2CCore
.
readcmd
)
# <---
else
:
self
.
cmd_stat
.
write
(
I2CCore
.
readcmd
|
I2CCore
.
ack
|
I2CCore
.
stopcmd
)
# <--- This tells the slave that it is the last word
self
.
target
.
dispatch
()
self
.
target
.
dispatch
()
ack
=
self
.
delayorcheckack
()
val
=
self
.
data
.
read
()
self
.
target
.
dispatch
()
...
...
projects/64ch/firmware/hdl/payload.vhd
View file @
baaf2004
...
...
@@ -98,7 +98,7 @@ begin
);
stat
(
0
)
<=
X"a753"
&
FW_REV
;
stat
(
1
)
<=
X"0000
0"
&
addr
&
'0'
&
chan_err
&
idelayctrl_rdy
&
locked
;
stat
(
1
)
<=
X"0000
"
&
addr
&
"00000"
&
chan_err
&
idelayctrl_rdy
&
locked
;
soft_rst
<=
ctrl
(
0
)(
0
);
nuke
<=
ctrl
(
0
)(
1
);
...
...
projects/64ch/software/Si5345_status.py
View file @
baaf2004
...
...
@@ -18,6 +18,6 @@ clock_I2C = I2CCore(hw, 10, 5, "io.i2c", None)
zeClock
=
si5344
(
clock_I2C
)
res
=
zeClock
.
getDeviceVersion
()
for
ipage
in
range
(
10
):
for
ireg
in
range
(
0x100
):
addr
=
(
ipage
<<
8
)
+
ireg
print
hex
(
addr
),
hex
(
zeClock
.
readRegister
(
addr
,
1
)[
0
])
for
ireg
in
range
(
0x100
):
addr
=
(
ipage
<<
8
)
+
ireg
print
hex
(
addr
),
hex
(
zeClock
.
readRegister
(
addr
,
1
)[
0
])
projects/64ch/software/adc_setup.py
View file @
baaf2004
...
...
@@ -6,30 +6,30 @@ import sys
from
I2CuHal
import
I2CCore
def
spi_config
(
spi
,
div
,
ctrl
,
ss
):
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2410
)
# 16b transfer length, auto CSN
spi
.
getNode
(
"ss"
)
.
write
(
0x1
)
# Enable SPI slave 0
spi
.
getClient
()
.
dispatch
()
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2410
)
# 16b transfer length, auto CSN
spi
.
getNode
(
"ss"
)
.
write
(
0x1
)
# Enable SPI slave 0
spi
.
getClient
()
.
dispatch
()
def
spi_write
(
spi
,
addr
,
data
):
spi
.
getNode
(
"d0"
)
.
write
((
addr
<<
8
)
+
data
)
# Write data into addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI write error"
,
hex
(
addr
),
hex
(
data
)
spi
.
getNode
(
"d0"
)
.
write
((
addr
<<
8
)
+
data
)
# Write data into addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI write error"
,
hex
(
addr
),
hex
(
data
)
def
spi_read
(
spi
,
addr
):
spi
.
getNode
(
"d0"
)
.
write
(
0x8000
+
(
addr
<<
8
))
# Read from addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI read error"
,
hex
(
addr
)
return
d
&
0xffff
spi
.
getNode
(
"d0"
)
.
write
(
0x8000
+
(
addr
<<
8
))
# Read from addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI read error"
,
hex
(
addr
)
return
d
&
0xffff
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
hw
=
uhal
.
getDevice
(
"board"
,
"ipbusudp-2.0://192.168.235.50:50001"
,
"file://addrtab/top.xml"
)
...
...
@@ -38,11 +38,11 @@ spi = hw.getNode("io.spi")
spi_config
(
spi
,
0xf
,
0x2410
,
0x1
)
# Divide 31.25MHz ipbus clock by 32; 16b transfer length, auto CSN; Enable SPI slave 0
for
i
in
range
(
0xf
):
print
"Set bank to:"
,
hex
(
i
)
hw
.
getNode
(
"csr.ctrl.io_sel"
)
.
write
(
i
)
# Select ADC bank to talk to
hw
.
dispatch
()
spi_write
(
spi
,
0x0
,
0x80
)
# Reset ADC
spi_write
(
spi
,
0x2
,
0x05
)
# 14b 1 lane mode
spi_write
(
spi
,
0x3
,
0xbf
)
# ALl zeroes test pattern
spi_write
(
spi
,
0x4
,
0xff
)
# All zeroes test pattern
print
hex
(
spi_read
(
spi
,
0x2
)),
hex
(
spi_read
(
spi
,
0x3
)),
hex
(
spi_read
(
spi
,
0x4
))
print
"Set bank to:"
,
hex
(
i
)
hw
.
getNode
(
"csr.ctrl.io_sel"
)
.
write
(
i
)
# Select ADC bank to talk to
hw
.
dispatch
()
spi_write
(
spi
,
0x0
,
0x80
)
# Reset ADC
spi_write
(
spi
,
0x2
,
0x05
)
# 14b 1 lane mode
spi_write
(
spi
,
0x3
,
0xbf
)
# ALl zeroes test pattern
spi_write
(
spi
,
0x4
,
0xff
)
# All zeroes test pattern
print
hex
(
spi_read
(
spi
,
0x2
)),
hex
(
spi_read
(
spi
,
0x3
)),
hex
(
spi_read
(
spi
,
0x4
))
projects/64ch/software/align_adc.py
View file @
baaf2004
...
...
@@ -4,40 +4,38 @@ import uhal
import
time
import
sys
import
collections
import
pickle
def
spi_config
(
spi
,
div
,
ctrl
,
ss
):
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2410
)
# 16b transfer length, auto CSN
spi
.
getNode
(
"ss"
)
.
write
(
0x1
)
# Enable SPI slave 0
spi
.
getClient
()
.
dispatch
()
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2410
)
# 16b transfer length, auto CSN
spi
.
getNode
(
"ss"
)
.
write
(
0x1
)
# Enable SPI slave 0
spi
.
getClient
()
.
dispatch
()
def
spi_write
(
spi
,
addr
,
data
):
spi
.
getNode
(
"d0"
)
.
write
((
addr
<<
8
)
+
data
)
# Write data into addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI write error"
,
hex
(
addr
),
hex
(
data
)
spi
.
getNode
(
"d0"
)
.
write
((
addr
<<
8
)
+
data
)
# Write data into addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI write error"
,
hex
(
addr
),
hex
(
data
)
def
spi_read
(
spi
,
addr
):
spi
.
getNode
(
"d0"
)
.
write
(
0x8000
+
(
addr
<<
8
))
# Read from addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI read error"
,
hex
(
addr
)
return
d
&
0xffff
spi
.
getNode
(
"d0"
)
.
write
(
0x8000
+
(
addr
<<
8
))
# Read from addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI read error"
,
hex
(
addr
)
return
d
&
0xffff
offsets
=
[
0
,
13
,
2
,
1
,
4
,
3
,
6
,
5
,
8
,
7
,
10
,
9
,
12
,
11
]
invert
=
[
0x1d
,
0x1e
,
0x1f
,
0x20
,
0x21
,
0x22
,
0x23
,
0x24
,
0x25
]
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
board
=
uhal
.
getDevice
(
"board"
,
"ipbusudp-2.0://192.168.235.51:50001"
,
"file://addrtab/top.xml"
)
#board = uhal.getDevice("board", "ipbusudp-2.0://192.168.235.16:50001", "file://addrtab/top_sim.xml")
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
INFO
)
manager
=
uhal
.
ConnectionManager
(
"file://connections.xml"
)
board
=
manager
.
getDevice
(
sys
.
argv
[
1
])
board
.
getClient
()
.
setTimeoutPeriod
(
10000
)
...
...
@@ -56,98 +54,106 @@ time.sleep(1)
chans
=
range
(
0x40
)
adcs
=
range
(
0x10
)
patt
=
0x0ff
cap_len
=
0x
8
0
cap_len
=
0x
40
0
taps_per_slip
=
22
spi
=
board
.
getNode
(
"io.spi"
)
spi_config
(
spi
,
0xf
,
0x2410
,
0x1
)
# Divide 31.25MHz ipbus clock by 32; 16b transfer length, auto CSN; Enable SPI slave 0
for
i
in
adcs
:
board
.
getNode
(
"csr.ctrl.io_sel"
)
.
write
(
i
)
# Select ADC bank to talk to
board
.
dispatch
()
spi_write
(
spi
,
0x0
,
0x80
)
# Reset ADC
spi_write
(
spi
,
0x2
,
0x05
)
# 14b 1 lane mode
spi_write
(
spi
,
0x3
,
0x80
+
(
patt
>>
8
))
# Test pattern
spi_write
(
spi
,
0x4
,
patt
&
0xff
)
# Test pattern
board
.
getNode
(
"csr.ctrl.io_sel"
)
.
write
(
i
)
# Select ADC bank to talk to
board
.
dispatch
()
spi_write
(
spi
,
0x0
,
0x80
)
# Reset ADC
spi_write
(
spi
,
0x2
,
0x05
)
# 14b 1 lane mode
spi_write
(
spi
,
0x3
,
0x80
+
(
patt
>>
8
))
# Test pattern
spi_write
(
spi
,
0x4
,
patt
&
0xff
)
# Test pattern
settings
=
[]
for
i_chan
in
chans
:
board
.
getNode
(
"csr.ctrl.chan"
)
.
write
(
i_chan
)
# Talk to channel 0
board
.
getNode
(
"daq.chan.csr.ctrl.mode"
)
.
write
(
0x1
)
# Set to capture mode
board
.
getNode
(
"daq.chan.csr.ctrl.src"
)
.
write
(
0x0
)
# Set source to ADC
board
.
getNode
(
"daq.chan.csr.ctrl.en_sync"
)
.
write
(
0x1
)
# Enable sync commands
if
i_chan
in
invert
:
board
.
getNode
(
"daq.chan.csr.ctrl.invert"
)
.
write
(
0x1
)
# Invert the data
board
.
getNode
(
"daq.chan.csr.ctrl.en_buf"
)
.
write
(
0x1
)
# Enable this channel
board
.
dispatch
()
res
=
[
False
]
*
(
15
*
taps_per_slip
)
tr
=
[]
for
i_slip
in
range
(
14
):
ok
=
False
for
i_tap
in
range
(
32
):
atap
=
board
.
getNode
(
"daq.chan.csr.stat.tap"
)
.
read
()
aslip
=
board
.
getNode
(
"daq.chan.csr.stat.slip"
)
.
read
()
board
.
dispatch
()
# print "Set slip, tap ; actual slip, tap", hex(i_slip), hex(i_tap), hex(aslip), hex(atap)
if
i_slip
!=
aslip
or
i_tap
!=
atap
:
print
"Colossal bullshit has occured"
sys
.
exit
()
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x1
)
# Capture
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x0
)
board
.
dispatch
()
time
.
sleep
(
0.01
)
while
True
:
r
=
board
.
getNode
(
"daq.chan.csr.stat"
)
.
read
()
board
.
getNode
(
"daq.chan.buf.addr"
)
.
write
(
0x0
)
d
=
board
.
getNode
(
"daq.chan.buf.data"
)
.
readBlock
(
cap_len
)
board
.
dispatch
()
if
r
&
0x1
==
1
:
break
print
"Crap no capture"
,
hex
(
i_chan
),
hex
(
i_slip
),
hex
(
i_tap
),
hex
(
r
),
time
.
clock
()
c
=
0
for
w
in
d
:
if
int
(
w
)
&
0x3ff
==
patt
:
c
+=
1
# print hex(w),
# print hex(i_chan), hex(i_slip), hex(i_tap), c
res
[
offsets
[
i_slip
]
*
taps_per_slip
+
(
31
-
i_tap
)]
=
(
c
==
cap_len
)
ok
=
(
c
==
cap_len
)
or
ok
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x1
)
# Increment tap
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x0
)
board
.
dispatch
()
if
ok
:
tr
.
append
(
i_slip
)
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x1
)
# Increment slip
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x0
)
board
.
dispatch
()
trp
=
""
min
=
0
max
=
0
non_cont
=
False
for
i
in
range
(
len
(
res
)
-
1
):
if
res
[
i
+
1
]
and
not
res
[
i
]:
if
min
==
0
:
min
=
i
+
1
else
:
non_cont
=
True
elif
res
[
i
]
and
not
res
[
i
+
1
]:
if
max
==
0
:
max
=
i
else
:
non_cont
=
True
if
res
[
i
]
==
None
:
trp
+=
"_"
elif
res
[
i
]:
trp
+=
"+"
else
:
trp
+=
"."
a
=
int
((
min
+
max
)
/
2
)
d_slip
=
offsets
.
index
(
a
//
taps_per_slip
)
d_tap
=
a
%
taps_per_slip
print
trp
if
not
non_cont
:
print
"Chan, rec_slip, rec_tap:"
,
i_chan
,
d_slip
,
d_tap
else
:
print
"Chan, NON CONTINUOUS RANGE"
,
hex
(
i_chan
),
trp
board
.
getNode
(
"csr.ctrl.chan"
)
.
write
(
i_chan
)
# Talk to correct channel
board
.
getNode
(
"daq.chan.csr.ctrl.mode"
)
.
write
(
0x1
)
# Set to capture mode
board
.
getNode
(
"daq.chan.csr.ctrl.src"
)
.
write
(
0x0
)
# Set source to ADC
board
.
getNode
(
"daq.chan.csr.ctrl.en_sync"
)
.
write
(
0x1
)
# Enable sync commands
if
i_chan
in
invert
:
board
.
getNode
(
"daq.chan.csr.ctrl.invert"
)
.
write
(
0x1
)
# Invert the data
board
.
getNode
(
"daq.chan.csr.ctrl.en_buf"
)
.
write
(
0x1
)
# Enable this channel
board
.
dispatch
()
res
=
[
False
]
*
(
17
*
taps_per_slip
)
tr
=
[]
for
i_slip
in
range
(
14
):
ok
=
False
for
i_tap
in
range
(
32
):
atap
=
board
.
getNode
(
"daq.chan.csr.stat.tap"
)
.
read
()
aslip
=
board
.
getNode
(
"daq.chan.csr.stat.slip"
)
.
read
()
board
.
dispatch
()
if
i_slip
!=
aslip
or
i_tap
!=
atap
:
print
"Colossal bullshit has occured, i_slip, i_tap, atap, aslip:"
,
i_slip
,
i_tap
,
atap
,
aslip
sys
.
exit
()
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x1
)
# Capture
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x0
)
board
.
dispatch
()
# time.sleep(0.01)
while
True
:
r
=
board
.
getNode
(
"daq.chan.csr.stat"
)
.
read
()
board
.
getNode
(
"daq.chan.buf.addr"
)
.
write
(
0x0
)
d
=
board
.
getNode
(
"daq.chan.buf.data"
)
.
readBlock
(
cap_len
)
board
.
dispatch
()
if
r
&
0x1
==
1
:
break
print
"Crap no capture"
,
hex
(
i_chan
),
hex
(
i_slip
),
hex
(
i_tap
),
hex
(
r
),
time
.
clock
()
c
=
0
for
w
in
d
:
if
int
(
w
)
&
0x3ff
==
patt
:
c
+=
1
# print hex(w),
# print hex(i_chan), hex(i_slip), hex(i_tap), c
res
[(
offsets
[
i_slip
]
+
2
)
*
taps_per_slip
-
i_tap
]
=
(
c
==
cap_len
)
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x1
)
# Increment tap
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x0
)
board
.
dispatch
()
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x1
)
# Increment slip
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x0
)
board
.
dispatch
()
trp
=
""
min
=
0
max
=
0
non_cont
=
False
for
i
in
range
(
len
(
res
)
-
1
):
if
res
[
i
+
1
]
and
not
res
[
i
]:
if
min
==
0
:
min
=
i
+
1
else
:
non_cont
=
True
elif
res
[
i
]
and
not
res
[
i
+
1
]:
if
max
==
0
:
max
=
i
else
:
non_cont
=
True
if
res
[
i
]
==
None
:
trp
+=
"_"
elif
res
[
i
]:
trp
+=
"+"
else
:
trp
+=
"."
a
=
int
((
min
+
max
)
/
2
)
d_slip
=
0
d_tap
=
0
for
i_slip
in
range
(
14
):
for
i_tap
in
range
(
taps_per_slip
):
if
a
==
(
offsets
[
i_slip
]
+
2
)
*
taps_per_slip
-
i_tap
:
d_slip
=
i_slip
d_tap
=
i_tap
# print trp
if
not
non_cont
:
print
"Chan, rec_slip, rec_tap:"
,
hex
(
i_chan
),
hex
(
d_slip
),
hex
(
d_tap
)
settings
.
append
((
i_chan
,
d_slip
,
d_tap
))
else
:
print
"Chan, NON CONTINUOUS RANGE"
,
hex
(
i_chan
),
trp
f
=
open
(
sys
.
argv
[
2
],
'w'
)
pickle
.
dump
(
settings
,
f
)
f
.
close
()
projects/64ch/software/align_adc_all.py
View file @
baaf2004
...
...
@@ -6,30 +6,30 @@ import sys
import
collections
def
spi_config
(
spi
,
div
,
ctrl
,
ss
):
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2410
)
# 16b transfer length, auto CSN
spi
.
getNode
(
"ss"
)
.
write
(
0x1
)
# Enable SPI slave 0
spi
.
getClient
()
.
dispatch
()
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2410
)
# 16b transfer length, auto CSN
spi
.
getNode
(
"ss"
)
.
write
(
0x1
)
# Enable SPI slave 0
spi
.
getClient
()
.
dispatch
()
def
spi_write
(
spi
,
addr
,
data
):
spi
.
getNode
(
"d0"
)
.
write
((
addr
<<
8
)
+
data
)
# Write data into addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI write error"
,
hex
(
addr
),
hex
(
data
)
spi
.
getNode
(
"d0"
)
.
write
((
addr
<<
8
)
+
data
)
# Write data into addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI write error"
,
hex
(
addr
),
hex
(
data
)
def
spi_read
(
spi
,
addr
):
spi
.
getNode
(
"d0"
)
.
write
(
0x8000
+
(
addr
<<
8
))
# Read from addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI read error"
,
hex
(
addr
)
return
d
&
0xffff
spi
.
getNode
(
"d0"
)
.
write
(
0x8000
+
(
addr
<<
8
))
# Read from addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI read error"
,
hex
(
addr
)
return
d
&
0xffff
offsets
=
[
0
,
13
,
2
,
1
,
4
,
3
,
6
,
5
,
8
,
7
,
10
,
9
,
12
,
11
]
invert
=
[
0x1d
,
0x1e
,
0x1f
,
0x20
,
0x21
,
0x22
,
0x23
,
0x24
,
0x25
]
...
...
@@ -63,91 +63,91 @@ spi = board.getNode("io.spi")
spi_config
(
spi
,
0xf
,
0x2410
,
0x1
)
# Divide 31.25MHz ipbus clock by 32; 16b transfer length, auto CSN; Enable SPI slave 0
for
i
in
adcs
:
board
.
getNode
(
"csr.ctrl.io_sel"
)
.
write
(
i
)
# Select ADC bank to talk to
board
.
dispatch
()
spi_write
(
spi
,
0x0
,
0x80
)
# Reset ADC
spi_write
(
spi
,
0x2
,
0x05
)
# 14b 1 lane mode
spi_write
(
spi
,
0x3
,
0x80
+
(
patt
>>
8
))
# Test pattern
spi_write
(
spi
,
0x4
,
patt
&
0xff
)
# Test pattern
board
.
getNode
(
"csr.ctrl.io_sel"
)
.
write
(
i
)
# Select ADC bank to talk to
board
.
dispatch
()
spi_write
(
spi
,
0x0
,
0x80
)
# Reset ADC
spi_write
(
spi
,
0x2
,
0x05
)
# 14b 1 lane mode
spi_write
(
spi
,
0x3
,
0x80
+
(
patt
>>
8
))
# Test pattern
spi_write
(
spi
,
0x4
,
patt
&
0xff
)
# Test pattern
for
i_chan
in
chans
:
board
.
getNode
(
"csr.ctrl.chan"
)
.
write
(
i_chan
)
# Talk to channel 0
board
.
getNode
(
"daq.chan.csr.ctrl.mode"
)
.
write
(
0x1
)
# Set to capture mode
board
.
getNode
(
"daq.chan.csr.ctrl.src"
)
.
write
(
0x0
)
# Set source to ADC
board
.
getNode
(
"daq.chan.csr.ctrl.en_sync"
)
.
write
(
0x1
)
# Enable sync commands
if
i_chan
in
invert
:
board
.
getNode
(
"daq.chan.csr.ctrl.invert"
)
.
write
(
0x1
)
# Invert the data
board
.
getNode
(
"daq.chan.csr.ctrl.en_buf"
)
.
write
(
0x1
)
# Enable this channel
board
.
dispatch
()
res
=
[
False
]
*
(
15
*
taps_per_slip
)
tr
=
[]
for
i_slip
in
range
(
14
):
ok
=
False
for
i_tap
in
range
(
32
):
atap
=
board
.
getNode
(
"daq.chan.csr.stat.tap"
)
.
read
()
aslip
=
board
.
getNode
(
"daq.chan.csr.stat.slip"
)
.
read
()
board
.
dispatch
()
board
.
getNode
(
"csr.ctrl.chan"
)
.
write
(
i_chan
)
# Talk to channel 0
board
.
getNode
(
"daq.chan.csr.ctrl.mode"
)
.
write
(
0x1
)
# Set to capture mode
board
.
getNode
(
"daq.chan.csr.ctrl.src"
)
.
write
(
0x0
)
# Set source to ADC
board
.
getNode
(
"daq.chan.csr.ctrl.en_sync"
)
.
write
(
0x1
)
# Enable sync commands
if
i_chan
in
invert
:
board
.
getNode
(
"daq.chan.csr.ctrl.invert"
)
.
write
(
0x1
)
# Invert the data
board
.
getNode
(
"daq.chan.csr.ctrl.en_buf"
)
.
write
(
0x1
)
# Enable this channel
board
.
dispatch
()
res
=
[
False
]
*
(
15
*
taps_per_slip
)
tr
=
[]
for
i_slip
in
range
(
14
):
ok
=
False
for
i_tap
in
range
(
32
):
atap
=
board
.
getNode
(
"daq.chan.csr.stat.tap"
)
.
read
()
aslip
=
board
.
getNode
(
"daq.chan.csr.stat.slip"
)
.
read
()
board
.
dispatch
()
# print "Set slip, tap ; actual slip, tap", hex(i_slip), hex(i_tap), hex(aslip), hex(atap)
if
i_slip
!=
aslip
or
i_tap
!=
atap
:
print
"Colossal bullshit has occured"
sys
.
exit
()
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x1
)
# Capture
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x0
)
board
.
dispatch
()
time
.
sleep
(
0.01
)
while
True
:
r
=
board
.
getNode
(
"daq.chan.csr.stat"
)
.
read
()
board
.
getNode
(
"daq.chan.buf.addr"
)
.
write
(
0x0
)
d
=
board
.
getNode
(
"daq.chan.buf.data"
)
.
readBlock
(
cap_len
)
board
.
dispatch
()
if
r
&
0x1
==
1
:
break
print
"Crap no capture"
,
hex
(
i_chan
),
hex
(
i_slip
),
hex
(
i_tap
),
hex
(
r
),
time
.
clock
()
c
=
0
for
w
in
d
:
if
int
(
w
)
&
0x3ff
==
patt
:
c
+=
1
if
i_slip
!=
aslip
or
i_tap
!=
atap
:
print
"Colossal bullshit has occured"
sys
.
exit
()
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x1
)
# Capture
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x0
)
board
.
dispatch
()
time
.
sleep
(
0.01
)
while
True
:
r
=
board
.
getNode
(
"daq.chan.csr.stat"
)
.
read
()
board
.
getNode
(
"daq.chan.buf.addr"
)
.
write
(
0x0
)
d
=
board
.
getNode
(
"daq.chan.buf.data"
)
.
readBlock
(
cap_len
)
board
.
dispatch
()
if
r
&
0x1
==
1
:
break
print
"Crap no capture"
,
hex
(
i_chan
),
hex
(
i_slip
),
hex
(
i_tap
),
hex
(
r
),
time
.
clock
()
c
=
0
for
w
in
d
:
if
int
(
w
)
&
0x3ff
==
patt
:
c
+=
1
# print hex(w),
# print hex(i_chan), hex(i_slip), hex(i_tap), c
res
[
offsets
[
i_slip
]
*
taps_per_slip
+
(
31
-
i_tap
)]
=
(
c
==
cap_len
)
ok
=
(
c
==
cap_len
)
or
ok
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x1
)
# Increment tap
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x0
)
board
.
dispatch
()
if
ok
:
tr
.
append
(
i_slip
)
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x1
)
# Increment slip
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x0
)
board
.
dispatch
()
trp
=
""
min
=
0
max
=
0
non_cont
=
False
for
i
in
range
(
len
(
res
)
-
1
):
if
res
[
i
+
1
]
and
not
res
[
i
]:
if
min
==
0
:
min
=
i
+
1
else
:
non_cont
=
True
elif
res
[
i
]
and
not
res
[
i
+
1
]:
if
max
==
0
:
max
=
i
else
:
non_cont
=
True
if
res
[
i
]
==
None
:
trp
+=
"_"
elif
res
[
i
]:
trp
+=
"+"
else
:
trp
+=
"."
a
=
int
((
min
+
max
)
/
2
)
d_slip
=
offsets
.
index
(
a
//
taps_per_slip
)
d_tap
=
a
%
taps_per_slip
print
trp
if
not
non_cont
:
print
"Chan, rec_slip, rec_tap:"
,
i_chan
,
d_slip
,
d_tap
else
:
print
"Chan, NON CONTINUOUS RANGE"
,
hex
(
i_chan
),
trp
res
[
offsets
[
i_slip
]
*
taps_per_slip
+
(
31
-
i_tap
)]
=
(
c
==
cap_len
)
ok
=
(
c
==
cap_len
)
or
ok
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x1
)
# Increment tap
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x0
)
board
.
dispatch
()
if
ok
:
tr
.
append
(
i_slip
)
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x1
)
# Increment slip
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x0
)
board
.
dispatch
()
trp
=
""
min
=
0
max
=
0
non_cont
=
False
for
i
in
range
(
len
(
res
)
-
1
):
if
res
[
i
+
1
]
and
not
res
[
i
]:
if
min
==
0
:
min
=
i
+
1
else
:
non_cont
=
True
elif
res
[
i
]
and
not
res
[
i
+
1
]:
if
max
==
0
:
max
=
i
else
:
non_cont
=
True
if
res
[
i
]
==
None
:
trp
+=
"_"
elif
res
[
i
]:
trp
+=
"+"
else
:
trp
+=
"."
a
=
int
((
min
+
max
)
/
2
)
d_slip
=
offsets
.
index
(
a
//
taps_per_slip
)
d_tap
=
a
%
taps_per_slip
print
trp
if
not
non_cont
:
print
"Chan, rec_slip, rec_tap:"
,
i_chan
,
d_slip
,
d_tap
else
:
print
"Chan, NON CONTINUOUS RANGE"
,
hex
(
i_chan
),
trp
projects/64ch/software/align_adc_bulk.py
deleted
100755 → 0
View file @
5c75289b
#!/usr/bin/python
import
dataset
import
uhal
import
time
import
sys
import
collections
sys
.
path
.
append
(
'/home/dsaunder/workspace/go_projects/src/bitbucket.org/solidexperiment/readout-software/scripts/'
)
import
detector_config_tools
def
spi_config
(
spi
,
div
,
ctrl
,
ss
):
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2410
)
# 16b transfer length, auto CSN
spi
.
getNode
(
"ss"
)
.
write
(
0x1
)
# Enable SPI slave 0
spi
.
getClient
()
.
dispatch
()
def
spi_write
(
spi
,
addr
,
data
):
spi
.
getNode
(
"d0"
)
.
write
((
addr
<<
8
)
+
data
)
# Write data into addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI write error"
,
hex
(
addr
),
hex
(
data
)
def
spi_read
(
spi
,
addr
):
spi
.
getNode
(
"d0"
)
.
write
(
0x8000
+
(
addr
<<
8
))
# Read from addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI read error"
,
hex
(
addr
)
return
d
&
0xffff
offsets
=
[
0
,
13
,
2
,
1
,
4
,
3
,
6
,
5
,
8
,
7
,
10
,
9
,
12
,
11
]
invert
=
[
0x1d
,
0x1e
,
0x1f
,
0x20
,
0x21
,
0x22
,
0x23
,
0x24
,
0x25
]
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
ips
=
detector_config_tools
.
currentIPs
(
False
)
db
=
dataset
.
connect
(
'mysql://DAQGopher:gogogadgetdatabase@localhost/solid_phase1_running'
)
configID
=
0
#first time case
if
len
(
db
[
'TapSlips'
])
!=
0
:
configID
=
max
(
db
[
'TapSlips'
][
'configID'
])[
'configID'
]
+
1
print
'Bulk scanning ips:'
,
ips
print
'New TapSlips configID'
,
configID
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
iBoard
=
-
1
for
ith_ip
in
ips
:
iBoard
+=
1
ith_slips
,
ith_taps
=
[],
[]
print
'
\n
About to align ip:'
,
ith_ip
board
=
uhal
.
getDevice
(
"board"
,
"ipbusudp-2.0://192.168.235."
+
str
(
ith_ip
)
+
":50001"
,
"file://addrtab/top.xml"
)
#board = uhal.getDevice("board", "ipbusudp-2.0://192.168.235.16:50001", "file://addrtab/top_sim.xml")
#manager = uhal.ConnectionManager("file://connections.xml")
#board = manager.getDevice(sys.argv[1])
board
.
getClient
()
.
setTimeoutPeriod
(
10000
)
v
=
board
.
getNode
(
"csr.id"
)
.
read
()
board
.
dispatch
()
board
.
getNode
(
"daq.timing.csr.ctrl.rst"
)
.
write
(
1
)
# Hold clk40 domain in reset
board
.
dispatch
()
board
.
getNode
(
"csr.ctrl.soft_rst"
)
.
write
(
1
)
# Reset ipbus registers
board
.
dispatch
()
time
.
sleep
(
1
)
chans
=
range
(
0x40
)
adcs
=
range
(
0x10
)
patt
=
0x0ff
cap_len
=
0x80
taps_per_slip
=
22
spi
=
board
.
getNode
(
"io.spi"
)
spi_config
(
spi
,
0xf
,
0x2410
,
0x1
)
# Divide 31.25MHz ipbus clock by 32; 16b transfer length, auto CSN; Enable SPI slave 0
for
i
in
adcs
:
board
.
getNode
(
"csr.ctrl.io_sel"
)
.
write
(
i
)
# Select ADC bank to talk to
board
.
dispatch
()
spi_write
(
spi
,
0x0
,
0x80
)
# Reset ADC
spi_write
(
spi
,
0x2
,
0x05
)
# 14b 1 lane mode
spi_write
(
spi
,
0x3
,
0x80
+
(
patt
>>
8
))
# Test pattern
spi_write
(
spi
,
0x4
,
patt
&
0xff
)
# Test pattern
for
i_chan
in
chans
:
board
.
getNode
(
"csr.ctrl.chan"
)
.
write
(
i_chan
)
# Talk to channel 0
board
.
getNode
(
"daq.chan.csr.ctrl.mode"
)
.
write
(
0x1
)
# Set to capture mode
board
.
getNode
(
"daq.chan.csr.ctrl.src"
)
.
write
(
0x0
)
# Set source to ADC
board
.
getNode
(
"daq.chan.csr.ctrl.en_sync"
)
.
write
(
0x1
)
# Enable sync commands
if
i_chan
in
invert
:
board
.
getNode
(
"daq.chan.csr.ctrl.invert"
)
.
write
(
0x1
)
# Invert the data
board
.
getNode
(
"daq.chan.csr.ctrl.en_buf"
)
.
write
(
0x1
)
# Enable this channel
board
.
dispatch
()
res
=
[
False
]
*
(
15
*
taps_per_slip
)
tr
=
[]
for
i_slip
in
range
(
14
):
ok
=
False
for
i_tap
in
range
(
32
):
atap
=
board
.
getNode
(
"daq.chan.csr.stat.tap"
)
.
read
()
aslip
=
board
.
getNode
(
"daq.chan.csr.stat.slip"
)
.
read
()
board
.
dispatch
()
# print "Set slip, tap ; actual slip, tap", hex(i_slip), hex(i_tap), hex(aslip), hex(atap)
if
i_slip
!=
aslip
or
i_tap
!=
atap
:
print
"Colossal bullshit has occured"
sys
.
exit
()
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x1
)
# Capture
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x0
)
board
.
dispatch
()
time
.
sleep
(
0.01
)
while
True
:
r
=
board
.
getNode
(
"daq.chan.csr.stat"
)
.
read
()
board
.
getNode
(
"daq.chan.buf.addr"
)
.
write
(
0x0
)
d
=
board
.
getNode
(
"daq.chan.buf.data"
)
.
readBlock
(
cap_len
)
board
.
dispatch
()
if
r
&
0x1
==
1
:
break
print
"Crap no capture"
,
hex
(
i_chan
),
hex
(
i_slip
),
hex
(
i_tap
),
hex
(
r
),
time
.
clock
()
c
=
0
for
w
in
d
:
if
int
(
w
)
&
0x3ff
==
patt
:
c
+=
1
# print hex(w),
# print hex(i_chan), hex(i_slip), hex(i_tap), c
res
[
offsets
[
i_slip
]
*
taps_per_slip
+
(
31
-
i_tap
)]
=
(
c
==
cap_len
)
ok
=
(
c
==
cap_len
)
or
ok
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x1
)
# Increment tap
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x0
)
board
.
dispatch
()
if
ok
:
tr
.
append
(
i_slip
)
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x1
)
# Increment slip
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x0
)
board
.
dispatch
()
trp
=
""
min
=
0
max
=
0
non_cont
=
False
for
i
in
range
(
len
(
res
)
-
1
):
if
res
[
i
+
1
]
and
not
res
[
i
]:
if
min
==
0
:
min
=
i
+
1
else
:
non_cont
=
True
elif
res
[
i
]
and
not
res
[
i
+
1
]:
if
max
==
0
:
max
=
i
else
:
non_cont
=
True
if
res
[
i
]
==
None
:
trp
+=
"_"
elif
res
[
i
]:
trp
+=
"+"
else
:
trp
+=
"."
a
=
int
((
min
+
max
)
/
2
)
d_slip
=
offsets
.
index
(
a
//
taps_per_slip
)
d_tap
=
a
%
taps_per_slip
ith_slips
.
append
(
d_slip
)
ith_taps
.
append
(
d_tap
)
print
trp
db
[
'TapSlips'
]
.
insert
({
'configID'
:
int
(
configID
),
'ip'
:
ith_ip
,
'tap'
:
d_tap
,
'slip'
:
d_slip
,
'channel'
:
i_chan
})
if
not
non_cont
:
print
"Chan, rec_slip, rec_tap:"
,
i_chan
,
d_slip
,
d_tap
else
:
print
"Chan, NON CONTINUOUS RANGE"
,
hex
(
i_chan
),
trp
print
'ith_slips'
,
ith_slips
print
'ith_taps'
,
ith_taps
projects/64ch/software/align_adc_nofuckup.py
View file @
baaf2004
...
...
@@ -6,30 +6,30 @@ import sys
import
collections
def
spi_config
(
spi
,
div
,
ctrl
,
ss
):
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2410
)
# 16b transfer length, auto CSN
spi
.
getNode
(
"ss"
)
.
write
(
0x1
)
# Enable SPI slave 0
spi
.
getClient
()
.
dispatch
()
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2410
)
# 16b transfer length, auto CSN
spi
.
getNode
(
"ss"
)
.
write
(
0x1
)
# Enable SPI slave 0
spi
.
getClient
()
.
dispatch
()
def
spi_write
(
spi
,
addr
,
data
):
spi
.
getNode
(
"d0"
)
.
write
((
addr
<<
8
)
+
data
)
# Write data into addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI write error"
,
hex
(
addr
),
hex
(
data
)
spi
.
getNode
(
"d0"
)
.
write
((
addr
<<
8
)
+
data
)
# Write data into addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI write error"
,
hex
(
addr
),
hex
(
data
)
def
spi_read
(
spi
,
addr
):
spi
.
getNode
(
"d0"
)
.
write
(
0x8000
+
(
addr
<<
8
))
# Read from addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI read error"
,
hex
(
addr
)
return
d
&
0xffff
spi
.
getNode
(
"d0"
)
.
write
(
0x8000
+
(
addr
<<
8
))
# Read from addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI read error"
,
hex
(
addr
)
return
d
&
0xffff
offsets
=
[
0
,
13
,
2
,
1
,
4
,
3
,
6
,
5
,
8
,
7
,
10
,
9
,
12
,
11
]
invert
=
[
0x1d
,
0x1e
,
0x1f
,
0x20
,
0x21
,
0x22
,
0x23
,
0x24
,
0x25
]
...
...
@@ -60,92 +60,92 @@ spi = board.getNode("io.spi")
spi_config
(
spi
,
0xf
,
0x2410
,
0x1
)
# Divide 31.25MHz ipbus clock by 32; 16b transfer length, auto CSN; Enable SPI slave 0
for
i
in
adcs
:
board
.
getNode
(
"csr.ctrl.io_sel"
)
.
write
(
i
)
# Select ADC bank to talk to
board
.
dispatch
()
spi_write
(
spi
,
0x0
,
0x80
)
# Reset ADC
spi_write
(
spi
,
0x2
,
0x05
)
# 14b 1 lane mode
spi_write
(
spi
,
0x3
,
0x80
+
(
patt
>>
8
))
# Test pattern
spi_write
(
spi
,
0x4
,
patt
&
0xff
)
# Test pattern
board
.
getNode
(
"csr.ctrl.io_sel"
)
.
write
(
i
)
# Select ADC bank to talk to
board
.
dispatch
()
spi_write
(
spi
,
0x0
,
0x80
)
# Reset ADC
spi_write
(
spi
,
0x2
,
0x05
)
# 14b 1 lane mode
spi_write
(
spi
,
0x3
,
0x80
+
(
patt
>>
8
))
# Test pattern
spi_write
(
spi
,
0x4
,
patt
&
0xff
)
# Test pattern
for
i_chan
in
chans
:
board
.
getNode
(
"csr.ctrl.chan"
)
.
write
(
i_chan
)
# Talk to channel 0
board
.
getNode
(
"daq.chan.csr.ctrl.mode"
)
.
write
(
0x1
)
# Set to capture mode
board
.
getNode
(
"daq.chan.csr.ctrl.src"
)
.
write
(
0x0
)
# Set source to ADC
board
.
getNode
(
"daq.chan.csr.ctrl.en_sync"
)
.
write
(
0x1
)
# Enable sync commands
if
i_chan
in
invert
:
board
.
getNode
(
"daq.chan.csr.ctrl.invert"
)
.
write
(
0x1
)
# Invert the data
board
.
getNode
(
"daq.chan.csr.ctrl.en_buf"
)
.
write
(
0x1
)
# Enable this channel
board
.
dispatch
()
res
=
[
False
]
*
(
17
*
taps_per_slip
)
tr
=
[]
for
i_slip
in
range
(
14
):
ok
=
False
for
i_tap
in
range
(
32
):
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x1
)
# Capture
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x0
)
board
.
dispatch
()
time
.
sleep
(
0.01
)
while
True
:
r
=
board
.
getNode
(
"daq.chan.csr.stat"
)
.
read
()
board
.
getNode
(
"daq.chan.buf.addr"
)
.
write
(
0x0
)
d
=
board
.
getNode
(
"daq.chan.buf.data"
)
.
readBlock
(
cap_len
)
board
.
dispatch
()
if
r
&
0x1
==
1
:
break
print
"Crap no capture"
,
hex
(
i_chan
),
hex
(
i_slip
),
hex
(
i_tap
),
hex
(
r
),
time
.
clock
()
c
=
0
for
w
in
d
:
if
int
(
w
)
&
0x3ff
==
patt
:
c
+=
1
board
.
getNode
(
"csr.ctrl.chan"
)
.
write
(
i_chan
)
# Talk to channel 0
board
.
getNode
(
"daq.chan.csr.ctrl.mode"
)
.
write
(
0x1
)
# Set to capture mode
board
.
getNode
(
"daq.chan.csr.ctrl.src"
)
.
write
(
0x0
)
# Set source to ADC
board
.
getNode
(
"daq.chan.csr.ctrl.en_sync"
)
.
write
(
0x1
)
# Enable sync commands
if
i_chan
in
invert
:
board
.
getNode
(
"daq.chan.csr.ctrl.invert"
)
.
write
(
0x1
)
# Invert the data
board
.
getNode
(
"daq.chan.csr.ctrl.en_buf"
)
.
write
(
0x1
)
# Enable this channel
board
.
dispatch
()
res
=
[
False
]
*
(
17
*
taps_per_slip
)
tr
=
[]
for
i_slip
in
range
(
14
):
ok
=
False
for
i_tap
in
range
(
32
):
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x1
)
# Capture
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x0
)
board
.
dispatch
()
time
.
sleep
(
0.01
)
while
True
:
r
=
board
.
getNode
(
"daq.chan.csr.stat"
)
.
read
()
board
.
getNode
(
"daq.chan.buf.addr"
)
.
write
(
0x0
)
d
=
board
.
getNode
(
"daq.chan.buf.data"
)
.
readBlock
(
cap_len
)
board
.
dispatch
()
if
r
&
0x1
==
1
:
break
print
"Crap no capture"
,
hex
(
i_chan
),
hex
(
i_slip
),
hex
(
i_tap
),
hex
(
r
),
time
.
clock
()
c
=
0
for
w
in
d
:
if
int
(
w
)
&
0x3ff
==
patt
:
c
+=
1
# print hex(w),
l
=
(
offsets
[
i_slip
]
+
2
)
*
taps_per_slip
-
i_tap
#print hex(i_chan), hex(i_slip), hex(i_tap), hex(l), hex(c)
res
[
l
]
=
(
c
==
cap_len
)
#print (c == cap_len), i_slip, i_tap
ok
=
(
c
==
cap_len
)
or
ok
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x1
)
# Increment tap
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x0
)
board
.
dispatch
()
if
ok
:
tr
.
append
(
i_slip
)
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x1
)
# Increment slip
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x0
)
board
.
dispatch
()
trp
=
""
min
=
0
max
=
0
non_cont
=
False
for
i
in
range
(
len
(
res
)
-
1
):
if
res
[
i
+
1
]
and
not
res
[
i
]:
if
min
==
0
:
min
=
i
+
1
else
:
non_cont
=
True
elif
res
[
i
]
and
not
res
[
i
+
1
]:
if
max
==
0
:
max
=
i
else
:
non_cont
=
True
if
res
[
i
]
==
None
:
trp
+=
"_"
elif
res
[
i
]:
trp
+=
"+"
else
:
trp
+=
"."
a
=
int
((
min
+
max
)
/
2
)
l_tap
=
taps_per_slip
d_slip
=
0
d_tap
=
0
for
i_slip
in
range
(
14
):
for
i_tap
in
range
(
taps_per_slip
):
if
a
==
(
offsets
[
i_slip
]
+
2
)
*
taps_per_slip
-
i_tap
:
d_slip
=
i_slip
d_tap
=
i_tap
print
trp
if
not
non_cont
:
print
"Chan, centre, rec_slip, rec_tap:"
,
hex
(
i_chan
),
hex
(
a
),
hex
(
d_slip
),
hex
(
d_tap
)
else
:
print
"Chan, NON CONTINUOUS RANGE"
,
hex
(
i_chan
),
trp
l
=
(
offsets
[
i_slip
]
+
2
)
*
taps_per_slip
-
i_tap
#print hex(i_chan), hex(i_slip), hex(i_tap), hex(l), hex(c)
res
[
l
]
=
(
c
==
cap_len
)
#print (c == cap_len), i_slip, i_tap
ok
=
(
c
==
cap_len
)
or
ok
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x1
)
# Increment tap
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x0
)
board
.
dispatch
()
if
ok
:
tr
.
append
(
i_slip
)
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x1
)
# Increment slip
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x0
)
board
.
dispatch
()
trp
=
""
min
=
0
max
=
0
non_cont
=
False
for
i
in
range
(
len
(
res
)
-
1
):
if
res
[
i
+
1
]
and
not
res
[
i
]:
if
min
==
0
:
min
=
i
+
1
else
:
non_cont
=
True
elif
res
[
i
]
and
not
res
[
i
+
1
]:
if
max
==
0
:
max
=
i
else
:
non_cont
=
True
if
res
[
i
]
==
None
:
trp
+=
"_"
elif
res
[
i
]:
trp
+=
"+"
else
:
trp
+=
"."
a
=
int
((
min
+
max
)
/
2
)
l_tap
=
taps_per_slip
d_slip
=
0
d_tap
=
0
for
i_slip
in
range
(
14
):
for
i_tap
in
range
(
taps_per_slip
):
if
a
==
(
offsets
[
i_slip
]
+
2
)
*
taps_per_slip
-
i_tap
:
d_slip
=
i_slip
d_tap
=
i_tap
print
trp
if
not
non_cont
:
print
"Chan, centre, rec_slip, rec_tap:"
,
hex
(
i_chan
),
hex
(
a
),
hex
(
d_slip
),
hex
(
d_tap
)
else
:
print
"Chan, NON CONTINUOUS RANGE"
,
hex
(
i_chan
),
trp
projects/64ch/software/call_align_adc.py
0 → 100644
View file @
baaf2004
import
os
import
dataset
import
sys
import
pickle
sys
.
path
.
append
(
'/home/dsaunder/workspace/go_projects/src/bitbucket.org/solidexperiment/readout-software/scripts/'
)
import
detector_config_tools
ips
=
detector_config_tools
.
currentIPs
(
False
)
print
ips
'''
for ip in ips:
cmd = "python align_adc.py BR2_" + str(ip) + " output_" + str(ip) + ".tapslips"
print cmd
try:
os.system(cmd)
except:
sys.exit(0)
'''
# Dump into a db
db
=
dataset
.
connect
(
'mysql://DAQGopher:gogogadgetdatabase@localhost/solid_phase1_running'
)
configID
=
0
#first time case
if
len
(
db
[
'TapSlips'
])
!=
0
:
configID
=
max
(
db
[
'TapSlips'
][
'configID'
])[
'configID'
]
+
1
print
'New config ID:'
,
configID
for
ip
in
ips
:
results
=
pickle
.
load
(
open
(
"output_"
+
str
(
ip
)
+
".tapslips"
,
"rb"
)
)
for
res
in
results
:
db
[
'TapSlips'
]
.
insert
({
'configID'
:
int
(
configID
),
'ip'
:
str
(
ip
),
'tap'
:
res
[
2
],
'slip'
:
res
[
1
],
'channel'
:
res
[
0
]})
projects/64ch/software/connections.xml
View file @
baaf2004
...
...
@@ -15,6 +15,24 @@
address_table=
"file://addrtab/top.xml"
/>
<connection
id=
"BR2_74"
uri=
"ipbusudp-2.0://192.168.235.74:50001"
address_table=
"file://addrtab/top.xml"
/>
<connection
id=
"BR2_54"
uri=
"ipbusudp-2.0://192.168.235.54:50001"
<connection
id=
"BR2_72"
uri=
"ipbusudp-2.0://192.168.235.72:50001"
address_table=
"file://addrtab/top.xml"
/>
<connection
id=
"BR2_62"
uri=
"ipbusudp-2.0://192.168.235.62:50001"
address_table=
"file://addrtab/top.xml"
/>
<connection
id=
"BR2_70"
uri=
"ipbusudp-2.0://192.168.235.70:50001"
address_table=
"file://addrtab/top.xml"
/>
<connection
id=
"BR2_71"
uri=
"ipbusudp-2.0://192.168.235.71:50001"
address_table=
"file://addrtab/top.xml"
/>
<connection
id=
"BR2_87"
uri=
"ipbusudp-2.0://192.168.235.87:50001"
address_table=
"file://addrtab/top.xml"
/>
<connection
id=
"BR2_94"
uri=
"ipbusudp-2.0://192.168.235.94:50001"
address_table=
"file://addrtab/top.xml"
/>
<connection
id=
"BR2_85"
uri=
"ipbusudp-2.0://192.168.235.83:50001"
address_table=
"file://addrtab/top.xml"
/>
<connection
id=
"BR2_83"
uri=
"ipbusudp-2.0://192.168.235.83:50001"
address_table=
"file://addrtab/top.xml"
/>
<connection
id=
"BR2_89"
uri=
"ipbusudp-2.0://192.168.235.89:50001"
address_table=
"file://addrtab/top.xml"
/>
<connection
id=
"BR2_68"
uri=
"ipbusudp-2.0://192.168.235.68:50001"
address_table=
"file://addrtab/top.xml"
/>
</connections>
projects/64ch/software/inspect_tapSlip_config.py
View file @
baaf2004
...
...
@@ -5,17 +5,15 @@ nChanJumps = 0
iEntry
=
-
1
prevChan
=
64
min_tap
,
max_tap
,
min_slip
,
max_slip
=
99
,
99
,
99
,
99
print
'Channel, slip, tap'
for
entry
in
db
[
'TapSlips'
]:
if
entry
[
'ip'
]
==
'51'
:
print
entry
[
'channel'
],
entry
[
'slip'
],
entry
[
'tap'
]
for
entry
in
db
[
'TapSlips'
]:
if
entry
[
'ip'
]
==
'72'
and
entry
[
'channel'
]
==
38
:
print
'IP 102:'
,
entry
'''
if entry['configID'] == 26:
if prevChan != entry['channel'] - 1:
#print entry
nChanJumps += 1
nChanJumps += 1
iEntry += 1
if iEntry == 0 or entry['tap'] > max_tap: max_tap = entry['tap']
if iEntry == 0 or entry ['tap'] < min_tap: min_tap = entry['tap']
...
...
projects/64ch/software/ro_test.py
View file @
baaf2004
...
...
@@ -6,23 +6,23 @@ import sys
import
collections
def
zsdot
(
i
):
return
' '
if
i
==
0
else
'*'
return
' '
if
i
==
0
else
'*'
def
zsfmt
(
i
):
return
"
%
s
%
s
%04
x
%
s
%
s
%04
x"
%
(
zsdot
(
i
&
0x8000
),
zsdot
(
i
&
0x4000
),
i
&
0x3fff
,
zsdot
(
i
&
0x80000000
),
zsdot
(
i
&
0x40000000
),
(
i
&
0x3fff0000
)
>>
16
)
return
"
%
s
%
s
%04
x
%
s
%
s
%04
x"
%
(
zsdot
(
i
&
0x8000
),
zsdot
(
i
&
0x4000
),
i
&
0x3fff
,
zsdot
(
i
&
0x80000000
),
zsdot
(
i
&
0x40000000
),
(
i
&
0x3fff0000
)
>>
16
)
def
dump
():
b0
=
board
.
getNode
(
"daq.trig.csr.evt_ctr"
)
.
read
()
# Event counter
b1
=
board
.
getNode
(
"daq.trig.csr.stat"
)
.
read
()
# Trigger block status
b2
=
board
.
getNode
(
"daq.roc.csr.stat"
)
.
read
()
# ROC status
b3
=
board
.
getNode
(
"daq.roc.buf.count"
)
.
read
()
# ROC buffer count
b4
=
board
.
getNode
(
"daq.roc.csr.tot_data"
)
.
read
()
# ROC total data issued
b5
=
board
.
getNode
(
"daq.chan.csr.stat"
)
.
read
()
# Channel status
b6
=
board
.
getNode
(
"daq.roc.csr.wctr"
)
.
read
()
# Debug - not important
board
.
dispatch
()
print
"Evt_ctr:
%08
x Trig_stat:
%08
x Roc_stat:
%08
x Buf_cnt:
%08
x Roc_tot:
%08
x Chan_stat:
%08
x Wctr:
%08
x"
%
(
int
(
b0
),
int
(
b1
),
int
(
b2
),
int
(
b3
),
int
(
b4
),
int
(
b5
),
int
(
b6
))
b0
=
board
.
getNode
(
"daq.trig.csr.evt_ctr"
)
.
read
()
# Event counter
b1
=
board
.
getNode
(
"daq.trig.csr.stat"
)
.
read
()
# Trigger block status
b2
=
board
.
getNode
(
"daq.roc.csr.stat"
)
.
read
()
# ROC status
b3
=
board
.
getNode
(
"daq.roc.buf.count"
)
.
read
()
# ROC buffer count
b4
=
board
.
getNode
(
"daq.roc.csr.tot_data"
)
.
read
()
# ROC total data issued
b5
=
board
.
getNode
(
"daq.chan.csr.stat"
)
.
read
()
# Channel status
b6
=
board
.
getNode
(
"daq.roc.csr.wctr"
)
.
read
()
# Debug - not important
board
.
dispatch
()
print
"Evt_ctr:
%08
x Trig_stat:
%08
x Roc_stat:
%08
x Buf_cnt:
%08
x Roc_tot:
%08
x Chan_stat:
%08
x Wctr:
%08
x"
%
(
int
(
b0
),
int
(
b1
),
int
(
b2
),
int
(
b3
),
int
(
b4
),
int
(
b5
),
int
(
b6
))
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
manager
=
uhal
.
ConnectionManager
(
"file://connections.xml"
)
...
...
@@ -41,13 +41,22 @@ board.dispatch()
sleep
(
1
)
tap
=
11
slip
=
7
for
i
in
range
(
1
):
board
.
getNode
(
"csr.ctrl.chan"
)
.
write
(
i
)
# Talk to channel 0
board
.
getNode
(
"daq.chan.csr.ctrl.mode"
)
.
write
(
0x0
)
# Set to normal DAQ mode
board
.
getNode
(
"daq.chan.csr.ctrl.src"
)
.
write
(
0x3
)
# Set source to fake data
board
.
getNode
(
"daq.chan.zs_thresh"
)
.
writeBlock
([
0x0
,
0x1
])
# Set ZS thresholds #0 = 0, #1 =1
board
.
getNode
(
"daq.chan.trig_thresh.threshold.thresh"
)
.
write
(
0x1000
)
# Set ctrig 0 threshold
board
.
getNode
(
"daq.chan.csr.ctrl.en_buf"
)
.
write
(
0x1
)
# Enable this channel
board
.
getNode
(
"csr.ctrl.chan"
)
.
write
(
38
)
# Talk to channel 0
board
.
getNode
(
"daq.chan.csr.ctrl.mode"
)
.
write
(
0x0
)
# Set to normal DAQ mode
board
.
getNode
(
"daq.chan.csr.ctrl.src"
)
.
write
(
0x3
)
# Set source to fake data
board
.
getNode
(
"daq.chan.zs_thresh"
)
.
writeBlock
([
0x0
,
0x1
])
# Set ZS thresholds #0 = 0, #1 =1
board
.
getNode
(
"daq.chan.trig_thresh.threshold.thresh"
)
.
write
(
0x1000
)
# Set ctrig 0 threshold
board
.
getNode
(
"daq.chan.csr.ctrl.en_buf"
)
.
write
(
0x1
)
# Enable this channel
for
islip
in
range
(
slip
):
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x1
)
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x0
)
for
itap
in
range
(
tap
):
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x1
)
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x0
)
board
.
getNode
(
"daq.fake.ctrl.mode"
)
.
write
(
0x1
)
# Set fake data to pulse
board
.
getNode
(
"daq.fake.ctrl.samp_lock"
)
.
write
(
0x1
)
# Lock to sample
...
...
@@ -85,91 +94,91 @@ n_trig = 4
print
"Firing triggers"
for
i
in
range
(
1
):
board
.
getNode
(
"daq.fake.ctrl.force"
)
.
write
(
0x1
)
board
.
getNode
(
"daq.fake.ctrl.force"
)
.
write
(
0x0
)
board
.
dispatch
()
board
.
getNode
(
"daq.fake.ctrl.force"
)
.
write
(
0x1
)
board
.
getNode
(
"daq.fake.ctrl.force"
)
.
write
(
0x0
)
board
.
dispatch
()
while
True
:
while
True
:
v1
=
board
.
getNode
(
"daq.roc.buf.count"
)
.
read
()
# Get the buffer data count
board
.
dispatch
()
if
v1
!=
0
:
break
b
=
board
.
getNode
(
"daq.roc.buf.data"
)
.
readBlock
(
int
(
v1
))
# Read the buffer contents
board
.
dispatch
()
r
+=
b
;
while
len
(
r
)
>
0
:
m
=
int
(
r
[
0
])
if
(
m
>>
24
)
!=
0xaa
:
print
"Bad news: event header incorrect"
dump
()
print
"
%08
x"
%
m
for
i
in
range
(
len
(
r
)):
print
"
%08
x"
%
int
(
r
[
i
])
sys
.
exit
()
l
=
m
&
0xffff
if
len
(
r
)
>=
l
:
w0
=
int
(
r
.
pop
(
0
))
w1
=
int
(
r
.
pop
(
0
))
rtype
=
(
w1
>>
28
)
print
"Shop! w0:
%08
x w1:
%08
x ro_type:
%
d len:
%04
x"
%
(
w0
,
w1
,
rtype
,
l
)
if
rtype
==
0
:
# A data block
bctr
=
w1
&
0xffffff
tstamp
=
int
(
r
.
pop
(
0
))
|
(
int
(
r
.
pop
(
0
))
<<
32
)
mask
=
int
(
r
.
pop
(
0
))
|
int
(
r
.
pop
(
0
))
>>
32
for
_
in
range
(
2
):
r
.
pop
(
0
)
c
=
bin
(
mask
)
.
count
(
'1'
)
print
"
\t
ctr:
%08
x time:
%012
x mask:
%016
x chans:
%02
x"
%
(
bctr
,
tstamp
,
mask
,
c
)
tcnt
=
0
for
i
in
range
(
c
):
print
"
\t
chan
%02
x"
%
(
i
)
print
"
\t\t
%04
x"
%
0
,
cnt
=
0
zcnt
=
0
while
True
:
cnt
+=
1
;
g
=
int
(
r
.
pop
(
0
))
if
g
&
0x4000
==
0
:
zcnt
+=
1
else
:
zcnt
+=
(
g
&
0x3fff
)
if
g
&
0x8000
==
0
:
if
g
&
0x40000000
==
0
:
zcnt
+=
1
else
:
zcnt
+=
((
g
&
0x3fff0000
)
>>
16
)
print
zsfmt
(
g
),
if
cnt
%
8
==
0
:
print
"
\n\t\t
%04
x"
%
cnt
,
if
g
&
0x80008000
!=
0
:
print
break
;
print
"
\t\t
len:
%04
x"
%
cnt
,
"zlen:
%04
x"
%
zcnt
if
zcnt
!=
0x100
:
print
"Bad news: chan
%02
x zcnt is
%04
x"
%
(
i
,
zcnt
)
dump
()
sys
.
exit
()
tcnt
+=
cnt
if
tcnt
!=
l
-
7
:
r
.
pop
(
0
)
evts
+=
1
if
evts
>=
max_evts
:
sys
.
exit
()
elif
rtype
==
1
:
# A trigger block
ttype
=
w1
&
0x3ffff
tstamp
=
int
(
r
.
pop
(
0
))
|
(
int
(
r
.
pop
(
0
))
<<
32
)
for
_
in
range
(
2
*
n_trig
+
1
):
#
print hex(r.pop(0))
r
.
pop
(
0
)
print
"
\t
tbits:
%08
x time:
%012
x"
%
(
ttype
,
tstamp
)
else
:
print
"Unknown readout type"
sys
.
exit
()
else
:
break
while
True
:
v1
=
board
.
getNode
(
"daq.roc.buf.count"
)
.
read
()
# Get the buffer data count
board
.
dispatch
()
if
v1
!=
0
:
break
b
=
board
.
getNode
(
"daq.roc.buf.data"
)
.
readBlock
(
int
(
v1
))
# Read the buffer contents
board
.
dispatch
()
r
+=
b
;
while
len
(
r
)
>
0
:
m
=
int
(
r
[
0
])
if
(
m
>>
24
)
!=
0xaa
:
print
"Bad news: event header incorrect"
dump
()
print
"
%08
x"
%
m
for
i
in
range
(
len
(
r
)):
print
"
%08
x"
%
int
(
r
[
i
])
sys
.
exit
()
l
=
m
&
0xffff
if
len
(
r
)
>=
l
:
w0
=
int
(
r
.
pop
(
0
))
w1
=
int
(
r
.
pop
(
0
))
rtype
=
(
w1
>>
28
)
print
"Shop! w0:
%08
x w1:
%08
x ro_type:
%
d len:
%04
x"
%
(
w0
,
w1
,
rtype
,
l
)
if
rtype
==
0
:
# A data block
bctr
=
w1
&
0xffffff
tstamp
=
int
(
r
.
pop
(
0
))
|
(
int
(
r
.
pop
(
0
))
<<
32
)
mask
=
int
(
r
.
pop
(
0
))
|
int
(
r
.
pop
(
0
))
>>
32
for
_
in
range
(
2
):
r
.
pop
(
0
)
c
=
bin
(
mask
)
.
count
(
'1'
)
print
"
\t
ctr:
%08
x time:
%012
x mask:
%016
x chans:
%02
x"
%
(
bctr
,
tstamp
,
mask
,
c
)
tcnt
=
0
for
i
in
range
(
c
):
print
"
\t
chan
%02
x"
%
(
i
)
print
"
\t\t
%04
x"
%
0
,
cnt
=
0
zcnt
=
0
while
True
:
cnt
+=
1
;
g
=
int
(
r
.
pop
(
0
))
if
g
&
0x4000
==
0
:
zcnt
+=
1
else
:
zcnt
+=
(
g
&
0x3fff
)
if
g
&
0x8000
==
0
:
if
g
&
0x40000000
==
0
:
zcnt
+=
1
else
:
zcnt
+=
((
g
&
0x3fff0000
)
>>
16
)
print
zsfmt
(
g
),
if
cnt
%
8
==
0
:
print
"
\n\t\t
%04
x"
%
cnt
,
if
g
&
0x80008000
!=
0
:
print
break
;
print
"
\t\t
len:
%04
x"
%
cnt
,
"zlen:
%04
x"
%
zcnt
if
zcnt
!=
0x100
:
print
"Bad news: chan
%02
x zcnt is
%04
x"
%
(
i
,
zcnt
)
dump
()
sys
.
exit
()
tcnt
+=
cnt
if
tcnt
!=
l
-
7
:
r
.
pop
(
0
)
evts
+=
1
if
evts
>=
max_evts
:
sys
.
exit
()
elif
rtype
==
1
:
# A trigger block
ttype
=
w1
&
0x3ffff
tstamp
=
int
(
r
.
pop
(
0
))
|
(
int
(
r
.
pop
(
0
))
<<
32
)
for
_
in
range
(
2
*
n_trig
+
1
):
#
print hex(r.pop(0))
r
.
pop
(
0
)
print
"
\t
tbits:
%08
x time:
%012
x"
%
(
ttype
,
tstamp
)
else
:
print
"Unknown readout type"
sys
.
exit
()
else
:
break
projects/64ch/software/setup.py
View file @
baaf2004
...
...
@@ -11,9 +11,7 @@ import detector_config_tools
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
ips
=
detector_config_tools
.
currentIPs
(
False
)
#ips = [62, 72, 70, 71, 87, 94, 89, 85, 83, 68, 51, 61, 52, 63, 91, 81, 67, 73, 57, 102, 74, 59, 96, 90, 64, 98, 76, 104, 54, 58]
ips
=
[
72
]
slaveReadoutBoards
=
True
slaveReadoutBoards
=
False
hw_list
=
[]
for
ip
in
ips
:
print
'Setting up readout board ip:'
,
ip
...
...
@@ -47,7 +45,7 @@ for hw in hw_list:
fv
=
hw
.
getNode
(
"io.freq_ctr.freq.valid"
)
.
read
();
hw
.
dispatch
()
print
"Freq:"
,
int
(
fv
),
int
(
fq
)
*
119.20928
/
1000000
;
#
if slaveReadoutBoards: hw.getNode("daq.timing.csr.ctrl.en_ext_sync").write(1)
if
slaveReadoutBoards
:
hw
.
getNode
(
"daq.timing.csr.ctrl.en_ext_sync"
)
.
write
(
1
)
f
=
hw
.
getNode
(
"csr.stat"
)
.
read
()
hw
.
dispatch
()
...
...
@@ -69,5 +67,3 @@ for hw in hw_list:
hw
.
dispatch
()
f
=
hw
.
getNode
(
"csr.stat"
)
.
read
()
hw
.
dispatch
()
projects/64ch/software/setup_all.py
View file @
baaf2004
...
...
@@ -50,7 +50,7 @@ while int(f) & 0x2 == 0:
hw
.
dispatch
()
f
=
hw
.
getNode
(
"csr.stat"
)
.
read
()
hw
.
dispatch
()
f_ver
=
hw
.
getNode
(
"csr.id"
)
.
read
()
hw
.
dispatch
()
...
...
projects/64ch/software/setup_orig.py
View file @
baaf2004
...
...
@@ -50,7 +50,7 @@ while int(f) & 0x2 == 0:
hw
.
dispatch
()
f
=
hw
.
getNode
(
"csr.stat"
)
.
read
()
hw
.
dispatch
()
f_ver
=
hw
.
getNode
(
"csr.id"
)
.
read
()
hw
.
dispatch
()
...
...
projects/64ch/software/spi_test.py
View file @
baaf2004
...
...
@@ -17,27 +17,27 @@ spi.getNode("ss").write(0x1) # Enable SPI slave 0
hw
.
dispatch
()
for
i
in
range
(
0x10000
):
ci
=
random
.
randint
(
0x0
,
0xf
)
di
=
random
.
randint
(
0x00
,
0xff
)
hw
.
getNode
(
"csr.ctrl.io_sel"
)
.
write
(
ci
)
# Select ADC bank to talk to
spi
.
getNode
(
"d0"
)
.
write
(
0x0400
+
di
)
# Write 0xa5 into register 0x4
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
hw
.
dispatch
()
#
d = spi.getNode("d0").read()
#
c = spi.getNode("ctrl").read()
#
hw.dispatch()
#
print hex(d), hex(c)
spi
.
getNode
(
"d0"
)
.
write
(
0x8400
)
# Read from register 0x4
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
hw
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
c
=
spi
.
getNode
(
"ctrl"
)
.
read
()
hw
.
dispatch
()
if
di
!=
(
d
&
0xff
)
or
(
c
&
0x100
)
!=
0
:
print
"Error:"
,
hex
(
i
),
hex
(
ci
),
hex
(
di
),
hex
(
d
),
hex
(
c
)
ci
=
random
.
randint
(
0x0
,
0xf
)
di
=
random
.
randint
(
0x00
,
0xff
)
hw
.
getNode
(
"csr.ctrl.io_sel"
)
.
write
(
ci
)
# Select ADC bank to talk to
spi
.
getNode
(
"d0"
)
.
write
(
0x0400
+
di
)
# Write 0xa5 into register 0x4
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
hw
.
dispatch
()
#
d = spi.getNode("d0").read()
#
c = spi.getNode("ctrl").read()
#
hw.dispatch()
#
print hex(d), hex(c)
spi
.
getNode
(
"d0"
)
.
write
(
0x8400
)
# Read from register 0x4
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
hw
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
c
=
spi
.
getNode
(
"ctrl"
)
.
read
()
hw
.
dispatch
()
if
di
!=
(
d
&
0xff
)
or
(
c
&
0x100
)
!=
0
:
print
"Error:"
,
hex
(
i
),
hex
(
ci
),
hex
(
di
),
hex
(
d
),
hex
(
c
)
projects/64ch/software/test_adc.py
0 → 100755
View file @
baaf2004
#!/usr/bin/python
import
uhal
import
time
import
sys
import
collections
import
pickle
def
spi_config
(
spi
,
div
,
ctrl
,
ss
):
spi
.
getNode
(
"divider"
)
.
write
(
0xf
)
# Divide 31.25MHz ipbus clock by 32
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2410
)
# 16b transfer length, auto CSN
spi
.
getNode
(
"ss"
)
.
write
(
0x1
)
# Enable SPI slave 0
spi
.
getClient
()
.
dispatch
()
def
spi_write
(
spi
,
addr
,
data
):
spi
.
getNode
(
"d0"
)
.
write
((
addr
<<
8
)
+
data
)
# Write data into addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI write error"
,
hex
(
addr
),
hex
(
data
)
def
spi_read
(
spi
,
addr
):
spi
.
getNode
(
"d0"
)
.
write
(
0x8000
+
(
addr
<<
8
))
# Read from addr
spi
.
getNode
(
"ctrl"
)
.
write
(
0x2510
)
# Do it
spi
.
getClient
()
.
dispatch
()
d
=
spi
.
getNode
(
"d0"
)
.
read
()
r
=
spi
.
getNode
(
"ctrl"
)
.
read
()
spi
.
getClient
()
.
dispatch
()
if
r
&
0x100
!=
0
:
print
"SPI read error"
,
hex
(
addr
)
return
d
&
0xffff
invert
=
[
0x1d
,
0x1e
,
0x1f
,
0x20
,
0x21
,
0x22
,
0x23
,
0x24
,
0x25
]
uhal
.
setLogLevelTo
(
uhal
.
LogLevel
.
ERROR
)
manager
=
uhal
.
ConnectionManager
(
"file://connections.xml"
)
board
=
manager
.
getDevice
(
sys
.
argv
[
1
])
board
.
getClient
()
.
setTimeoutPeriod
(
10000
)
v
=
board
.
getNode
(
"csr.id"
)
.
read
()
board
.
dispatch
()
board
.
getNode
(
"daq.timing.csr.ctrl.rst"
)
.
write
(
1
)
# Hold clk40 domain in reset
board
.
dispatch
()
board
.
getNode
(
"csr.ctrl.soft_rst"
)
.
write
(
1
)
# Reset ipbus registers
board
.
dispatch
()
time
.
sleep
(
1
)
adcs
=
range
(
0x10
)
patt
=
0x0ff
cap_len
=
0x400
reps
=
0x100
spi
=
board
.
getNode
(
"io.spi"
)
spi_config
(
spi
,
0xf
,
0x2410
,
0x1
)
# Divide 31.25MHz ipbus clock by 32; 16b transfer length, auto CSN; Enable SPI slave 0
for
i
in
adcs
:
board
.
getNode
(
"csr.ctrl.io_sel"
)
.
write
(
i
)
# Select ADC bank to talk to
board
.
dispatch
()
spi_write
(
spi
,
0x0
,
0x80
)
# Reset ADC
spi_write
(
spi
,
0x2
,
0x05
)
# 14b 1 lane mode
spi_write
(
spi
,
0x3
,
0x80
+
(
patt
>>
8
))
# Test pattern
spi_write
(
spi
,
0x4
,
patt
&
0xff
)
# Test pattern
f
=
open
(
sys
.
argv
[
2
])
settings
=
pickle
.
load
(
f
)
f
.
close
()
for
s_ch
in
settings
:
(
i_chan
,
i_slip
,
i_tap
)
=
s_ch
board
.
getNode
(
"csr.ctrl.chan"
)
.
write
(
i_chan
)
# Talk to correct channel
board
.
getNode
(
"daq.chan.csr.ctrl.mode"
)
.
write
(
0x1
)
# Set to capture mode
board
.
getNode
(
"daq.chan.csr.ctrl.src"
)
.
write
(
0x0
)
# Set source to ADC
board
.
getNode
(
"daq.chan.csr.ctrl.en_sync"
)
.
write
(
0x1
)
# Enable sync commands
if
i_chan
in
invert
:
board
.
getNode
(
"daq.chan.csr.ctrl.invert"
)
.
write
(
0x1
)
# Invert the data
board
.
getNode
(
"daq.chan.csr.ctrl.en_buf"
)
.
write
(
0x1
)
# Enable this channel
board
.
dispatch
()
for
_
in
range
(
i_slip
):
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x1
)
# Increment slip
board
.
getNode
(
"daq.timing.csr.ctrl.chan_slip"
)
.
write
(
0x0
)
board
.
dispatch
()
for
_
in
range
(
i_tap
):
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x1
)
# Increment tap
board
.
getNode
(
"daq.timing.csr.ctrl.chan_inc"
)
.
write
(
0x0
)
board
.
dispatch
()
atap
=
board
.
getNode
(
"daq.chan.csr.stat.tap"
)
.
read
()
aslip
=
board
.
getNode
(
"daq.chan.csr.stat.slip"
)
.
read
()
board
.
dispatch
()
if
i_slip
!=
aslip
or
i_tap
!=
atap
:
print
"Colossal bullshit has occured"
sys
.
exit
()
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x1
)
# Capture
board
.
getNode
(
"daq.timing.csr.ctrl.chan_cap"
)
.
write
(
0x0
)
board
.
dispatch
()
c
=
0
for
i
in
range
(
reps
):
while
True
:
r
=
board
.
getNode
(
"daq.chan.csr.stat"
)
.
read
()
board
.
getNode
(
"daq.chan.buf.addr"
)
.
write
(
0x0
)
d
=
board
.
getNode
(
"daq.chan.buf.data"
)
.
readBlock
(
cap_len
)
board
.
dispatch
()
if
r
&
0x1
==
1
:
break
print
"Crap no capture"
,
hex
(
i_chan
),
hex
(
i_slip
),
hex
(
i_tap
),
hex
(
r
),
time
.
clock
()
for
w
in
d
:
if
int
(
w
)
&
0x3ff
==
patt
:
c
+=
1
print
hex
(
i_chan
),
hex
(
i_slip
),
hex
(
i_tap
),
hex
(
c
)
if
c
!=
cap_len
*
reps
:
print
"Failure"
sys
.
exit
()
projects/64ch/software/test_links.py
View file @
baaf2004
...
...
@@ -47,4 +47,3 @@ print "us -- remote_id", hex((vu & 0xff0000) >> 16)
print
"ds -- rdy_tx, buf_tx, stat_tx:"
,
(
vd
&
0x1
),
hex
((
vd
&
0xc
)
>>
2
),
hex
((
vd
&
0x300
)
>>
8
)
print
"ds -- rdy_rx, buf_rx, stat_rx:"
,
(
vd
&
0x2
)
>>
1
,
hex
((
vd
&
0x70
)
>>
4
),
hex
((
vd
&
0x7c00
)
>>
10
)
print
"ds -- remote_id"
,
hex
((
vd
&
0xff0000
)
>>
16
)
projects/64ch/software/test_links_sim.py
View file @
baaf2004
...
...
@@ -48,4 +48,3 @@ vu = hw.getNode("daq.tlink.us_stat").read()
vd
=
hw
.
getNode
(
"daq.tlink.ds_stat"
)
.
read
()
hw
.
dispatch
()
print
"us, ds:"
,
hex
(
vu
),
hex
(
vd
)
Write
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