This function is useful to omit false positives
when detecting non consecutives samples, such
as the wraparound from 32767 to -32768, which
are consecutive samples to the binary point of view.

Not sure why, but anything less than that
causes segmentation fault on accessing
the structure.

This should be related to alignment issues.

This is good to ensure correct boundaries
on 64-bit systems.

We were using the linker table label
as a pointer, which was wrong. The
correct type for it is just an address
on which can be dereferenced later.

A clear way to do that is to just
declare it as the type on which you
wish to deference later.

This was supposed to be Malamute,
but it was CZMQ. Clearly a typo.

Now, we need to export our bootstrap structure
using the macro SMIO_MOD_DECLARE.

Instead of using a custom bogus object as the
EOF for the vector, we rely on the end references
declared in the linker.

Now, the correct name is _smio_mod_dispatach_table.

This will enable us to not use a static
global table like the one in sm_io_mod_dispatch.c.
We will be able to remove this file completely.

This is due to the following range of commits
on repo bpm-gw:

lnls-dig/bpm-gw@680f462966
..
lnls-dig/bpm-gw@719a91bc3a

We were printing the wrong information
inside the usage () function, causing
a "mix" in the information output.

Although some distros, like Ubuntu/Debian, do no
have /etc/sysconfig folder, we opted to keep it here
for now, as Ubuntu is not our primarily deploy platform.

This folder contains upstart service files

This folder contains systemd management
files

If the number of post-trigger samples is 0, do
not try to align it to anything (it's already aligned).

Now, hutils_wait_chld () returns, on successfully
waiting a child, its PID number, instead of 0.
This gives the ability to other functions to
distinguish between "nothing to wait for" from
"successfully waited child".

This fixes possible hanging dev_io_cfg children
there are waiting to be cleaned up by the parent.

This functions performs the same as hutils_wait_clhd (),
apart from that it employs a busy loop timeout, calling
hutils_wait_chld () each time and exiting if the timeout
is over.

We need to acquire a multiple number of
samples_alignment value. With samples_alignment
being 4 (typical for the ADC and ADCSWAP channels),
the following equation yields correct results:

num_samples_aligned = num_samples_pre + num_samples_aligned -
        (num_samples_pre % num_samples_aligned)

Kx,Ky values were just plain wrong. Instead of the
default value of 10_000_000 it was 1_000_000. Ksum
was using the value 1.0 with old value FIX25_24
that was used by the previous DSP chain. Now,
we use FIX25_0.

As we now have, in the same register, two fields,
acha_chan and acq_dtrig_chan, we must modify only the
bits associated with that field. Previously, when
we set the acquisition channel, we were rewriting the
whole register, effectively selection channel 0 for
the acq_dtrig_chan field.

Now, device names are created as
/dev/fpga-<bus_number << 8><device_fn> and as
/dev/fpga/<bus_number << 8><device_fn>