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SVEC BST Receiver
Commit 3073c42e authored by Tom Levens's avatar Tom Levens
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Cleanup

parent aa45594b
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Showing with 114 additions and 92 deletions
hdl/rtl/svec_top.vhd
View file @ 3073c42e
......@@ -108,8 +108,11 @@ end svec_top;
architecture rtl of svec_top is
-- Bit index in BST external triggers:
------------------------------------------------------------------------------
-- Bit indexes in BST external triggers:
-- https://wikis.cern.ch/display/BEBI/SPS+BST+Message
------------------------------------------------------------------------------
constant c_BST_PPS_BIT : integer := 4; -- byte 56, bit 4 (CTG 1 Hz)
constant c_BST_INJ_BIT : integer := 16; -- byte 58, bit 0 (inj pre-pulse)
constant c_BST_UA9_BIT : integer := 21; -- byte 58, bit 5 (UA9 trigger)
......@@ -143,6 +146,10 @@ architecture rtl of svec_top is
4 => f_sdb_embed_integration(c_integration_sdb)
);
------------------------------------------------------------------------------
-- Local signals
------------------------------------------------------------------------------
-- System clock
signal sys_clk_in : std_logic;
signal sys_clk_62_5_buf : std_logic;
......@@ -278,7 +285,7 @@ begin
if (vme_sysreset_n_i = '0' or rst_n_i = '0') then
powerup_rst_n <= '0';
elsif sys_clk_pll_locked = '1' then
if(powerup_reset_cnt = "11111111") then
if (powerup_reset_cnt = "11111111") then
powerup_rst_n <= '1';
else
powerup_rst_n <= '0';
......@@ -397,6 +404,7 @@ begin
-- BST decoder
------------------------------------------------------------------------------
-- Differential input buffers for CDR
cmp_cdr_clk_buf : IBUFGDS
generic map (
DIFF_TERM => true,
......@@ -417,11 +425,13 @@ begin
I => fmc_cdr_dat_p_i,
IB => fmc_cdr_dat_n_i);
fmc_s1_o <= "11"; -- CDR_CLK
fmc_s2_o <= "11"; -- CDR_CLK
fmc_s3_o <= "11"; -- CDR_CLK
fmc_s4_o <= "11"; -- CDR_CLK
-- Configure FMC clock routing
fmc_s1_o <= "11"; -- CDR_CLK => PCB TP (R13)
fmc_s2_o <= "11"; -- CDR_CLK => JITTER_CLEANER
fmc_s3_o <= "11"; -- CDR_CLK => CLK1_M2C
fmc_s4_o <= "11"; -- CDR_CLK => CLK0_M2C
-- BST decoder core
cmp_bst_decoder : BstDecoder
port map (
WbClk_ik => sys_clk_62_5,
......
hdl/svec_top.ucf
View file @ 3073c42e
#-------------------------------------------------------------------------------
# CLOCK CONSTRAINTS
#-------------------------------------------------------------------------------
NET "clk_20m_vcxo_i" TNM_NET = clk_20m_vcxo_i;
TIMESPEC TS_clk_20m_vcxo_i = PERIOD "clk_20m_vcxo_i" 20 MHz HIGH 50%;
NET "fmc_clk0_m2c_p_i" TNM_NET = fmc_clk0_m2c_p_i;
TIMESPEC TS_fmc_clk0_m2c_p_i = PERIOD "fmc_clk0_m2c_p_i" 160 MHz HIGH 50%;
#-------------------------------------------------------------------------------
# BOARD I/O
#-------------------------------------------------------------------------------
NET "vme_write_n_i" LOC = R1;
NET "vme_sysreset_n_i" LOC = P4;
#NET "vme_sysclk_i" LOC = P3;
......@@ -256,95 +264,99 @@ NET "led_column_o[1]" IOSTANDARD = "LVCMOS33";
NET "led_column_o[2]" IOSTANDARD = "LVCMOS33";
NET "led_column_o[3]" IOSTANDARD = "LVCMOS33";
#NET "" LOC = B13; # GBTCLK0_M2C_P
#NET "" LOC = A13; # GBTCLK0_M2C_N
#NET "" LOC = D10; # DP0_M2C_P
#NET "" LOC = C10; # DP0_M2C_N
#NET "" LOC = B9; # DP0_C2M_P
#NET "" LOC = A9; # DP0_C2M_N
#-------------------------------------------------------------------------------
# FMC SLOT 1
#-------------------------------------------------------------------------------
#NET "" LOC = B13; # FMC1 GBTCLK0_M2C_P
#NET "" LOC = A13; # FMC1 GBTCLK0_M2C_N
#NET "" LOC = D10; # FMC1 DP0_M2C_P
#NET "" LOC = C10; # FMC1 DP0_M2C_N
#NET "" LOC = B9; # FMC1 DP0_C2M_P
#NET "" LOC = A9; # FMC1 DP0_C2M_N
#NET "" LOC = N29; # PG_C2M
#NET "" LOC = N30; # PRSNT_M2C
#NET "" LOC = P28; # SCL
#NET "" LOC = P30; # SDA
#NET "" LOC = AJ30; # TCK
#NET "" LOC = AG30; # TDI
#NET "" LOC = AF30; # TDO
#NET "" LOC = AE25; # TMS
#NET "" LOC = N29; # FMC1 PG_C2M
#NET "" LOC = N30; # FMC1 PRSNT_M2C
#NET "" LOC = P28; # FMC1 SCL
#NET "" LOC = P30; # FMC1 SDA
#NET "" LOC = AJ30; # FMC1 TCK
#NET "" LOC = AG30; # FMC1 TDI
#NET "" LOC = AF30; # FMC1 TDO
#NET "" LOC = AE25; # FMC1 TMS
#NET "" LOC = E16; # CLK1_M2C_P
#NET "" LOC = D16; # CLK1_M2C_N
NET "fmc_clk0_m2c_p_i" LOC = H15; # CLK0_M2C_P
NET "fmc_clk0_m2c_n_i" LOC = G15; # CLK0_M2C_N
#NET "" LOC = E16; # FMC1 CLK1_M2C_P
#NET "" LOC = D16; # FMC1 CLK1_M2C_N
NET "fmc_clk0_m2c_p_i" LOC = H15; # FMC1 CLK0_M2C_P
NET "fmc_clk0_m2c_n_i" LOC = G15; # FMC1 CLK0_M2C_N
#NET "" LOC = J12; # LA33_P
#NET "" LOC = H11; # LA32_P
#NET "" LOC = L11; # LA31_P
#NET "" LOC = J13; # LA30_P
#NET "" LOC = F9; # LA29_P
#NET "" LOC = L12; # LA28_P
#NET "" LOC = M13; # LA27_P
#NET "" LOC = L14; # LA26_P
NET "fmc_cdr_lol_i" LOC = F11; # LA25_P
#NET "" LOC = G10; # LA24_P
#NET "" LOC = M15; # LA23_P
NET "fmc_cdr_los_i" LOC = F13; # LA22_P
#NET "" LOC = G12; # LA21_P
#NET "" LOC = F15; # LA20_P
#NET "" LOC = G14; # LA19_P
#NET "" LOC = J14; # LA18_P
#NET "" LOC = B15; # LA17_P
#NET "" LOC = F19; # LA16_P
#NET "" LOC = H16; # LA15_P
#NET "" LOC = F17; # LA14_P
#NET "" LOC = G18; # LA13_P
#NET "" LOC = F21; # LA12_P
#NET "" LOC = G20; # LA11_P
#NET "" LOC = L21; # LA10_P
NET "fmc_cdr_dat_p_i" LOC = M20; # LA09_P
#NET "" LOC = F23; # LA08_P
#NET "" LOC = G22; # LA07_P
#NET "" LOC = B25; # LA06_P
#NET "" LOC = M19; # LA05_P
NET "fmc_s2_o[0]" LOC = D24; # LA04_P
NET "fmc_s3_o[1]" LOC = E25; # LA03_P
NET "fmc_s4_o[1]" LOC = J22; # LA02_P
#NET "" LOC = H21; # LA01_P
NET "fmc_s4_o[0]" LOC = C16; # LA00_P
#NET "" LOC = H12; # LA33_N
#NET "" LOC = G11; # LA32_N
#NET "" LOC = K11; # LA31_N
#NET "" LOC = H13; # LA30_N
#NET "" LOC = E9; # LA29_N
#NET "" LOC = K12; # LA28_N
#NET "" LOC = L13; # LA27_N
#NET "" LOC = K14; # LA26_N
#NET "" LOC = E11; # LA25_N
#NET "" LOC = F10; # LA24_N
#NET "" LOC = K15; # LA23_N
#NET "" LOC = E13; # LA22_N
#NET "" LOC = F12; # LA21_N
#NET "" LOC = E15; # LA20_N
#NET "" LOC = F14; # LA19_N
#NET "" LOC = H14; # LA18_N
#NET "" LOC = A15; # LA17_N
#NET "" LOC = E19; # LA16_N
#NET "" LOC = G16; # LA15_N
#NET "" LOC = E17; # LA14_N
#NET "" LOC = F18; # LA13_N
#NET "" LOC = E21; # LA12_N
#NET "" LOC = F20; # LA11_N
#NET "" LOC = K21; # LA10_N
NET "fmc_cdr_dat_n_i" LOC = L20; # LA09_N
#NET "" LOC = E23; # LA08_N
#NET "" LOC = F22; # LA07_N
#NET "" LOC = A25; # LA06_N
#NET "" LOC = L19; # LA05_N
NET "fmc_s2_o[1]" LOC = C24; # LA04_N
NET "fmc_s1_o[0]" LOC = D25; # LA03_N
NET "fmc_s3_o[0]" LOC = H22; # LA02_N
#NET "" LOC = G21; # LA01_N
NET "fmc_s1_o[1]" LOC = A16; # LA00_N
#NET "" LOC = J12; # FMC1 LA33_P
#NET "" LOC = H11; # FMC1 LA32_P
#NET "" LOC = L11; # FMC1 LA31_P
#NET "" LOC = J13; # FMC1 LA30_P
#NET "" LOC = F9; # FMC1 LA29_P
#NET "" LOC = L12; # FMC1 LA28_P
#NET "" LOC = M13; # FMC1 LA27_P
#NET "" LOC = L14; # FMC1 LA26_P
NET "fmc_cdr_lol_i" LOC = F11; # FMC1 LA25_P
#NET "" LOC = G10; # FMC1 LA24_P
#NET "" LOC = M15; # FMC1 LA23_P
NET "fmc_cdr_los_i" LOC = F13; # FMC1 LA22_P
#NET "" LOC = G12; # FMC1 LA21_P
#NET "" LOC = F15; # FMC1 LA20_P
#NET "" LOC = G14; # FMC1 LA19_P
#NET "" LOC = J14; # FMC1 LA18_P
#NET "" LOC = B15; # FMC1 LA17_P
#NET "" LOC = F19; # FMC1 LA16_P
#NET "" LOC = H16; # FMC1 LA15_P
#NET "" LOC = F17; # FMC1 LA14_P
#NET "" LOC = G18; # FMC1 LA13_P
#NET "" LOC = F21; # FMC1 LA12_P
#NET "" LOC = G20; # FMC1 LA11_P
#NET "" LOC = L21; # FMC1 LA10_P
NET "fmc_cdr_dat_p_i" LOC = M20; # FMC1 LA09_P
#NET "" LOC = F23; # FMC1 LA08_P
#NET "" LOC = G22; # FMC1 LA07_P
#NET "" LOC = B25; # FMC1 LA06_P
#NET "" LOC = M19; # FMC1 LA05_P
NET "fmc_s2_o[0]" LOC = D24; # FMC1 LA04_P
NET "fmc_s3_o[1]" LOC = E25; # FMC1 LA03_P
NET "fmc_s4_o[1]" LOC = J22; # FMC1 LA02_P
#NET "" LOC = H21; # FMC1 LA01_P
NET "fmc_s4_o[0]" LOC = C16; # FMC1 LA00_P
#NET "" LOC = H12; # FMC1 LA33_N
#NET "" LOC = G11; # FMC1 LA32_N
#NET "" LOC = K11; # FMC1 LA31_N
#NET "" LOC = H13; # FMC1 LA30_N
#NET "" LOC = E9; # FMC1 LA29_N
#NET "" LOC = K12; # FMC1 LA28_N
#NET "" LOC = L13; # FMC1 LA27_N
#NET "" LOC = K14; # FMC1 LA26_N
#NET "" LOC = E11; # FMC1 LA25_N
#NET "" LOC = F10; # FMC1 LA24_N
#NET "" LOC = K15; # FMC1 LA23_N
#NET "" LOC = E13; # FMC1 LA22_N
#NET "" LOC = F12; # FMC1 LA21_N
#NET "" LOC = E15; # FMC1 LA20_N
#NET "" LOC = F14; # FMC1 LA19_N
#NET "" LOC = H14; # FMC1 LA18_N
#NET "" LOC = A15; # FMC1 LA17_N
#NET "" LOC = E19; # FMC1 LA16_N
#NET "" LOC = G16; # FMC1 LA15_N
#NET "" LOC = E17; # FMC1 LA14_N
#NET "" LOC = F18; # FMC1 LA13_N
#NET "" LOC = E21; # FMC1 LA12_N
#NET "" LOC = F20; # FMC1 LA11_N
#NET "" LOC = K21; # FMC1 LA10_N
NET "fmc_cdr_dat_n_i" LOC = L20; # FMC1 LA09_N
#NET "" LOC = E23; # FMC1 LA08_N
#NET "" LOC = F22; # FMC1 LA07_N
#NET "" LOC = A25; # FMC1 LA06_N
#NET "" LOC = L19; # FMC1 LA05_N
NET "fmc_s2_o[1]" LOC = C24; # FMC1 LA04_N
NET "fmc_s1_o[0]" LOC = D25; # FMC1 LA03_N
NET "fmc_s3_o[0]" LOC = H22; # FMC1 LA02_N
#NET "" LOC = G21; # FMC1 LA01_N
NET "fmc_s1_o[1]" LOC = A16; # FMC1 LA00_N
NET "fmc_clk0_m2c_p_i" IOSTANDARD = "LVDS_25";
NET "fmc_clk0_m2c_n_i" IOSTANDARD = "LVDS_25";
......
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