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Commit 7554f819 authored by Federico Vaga's avatar Federico Vaga
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zio-sysfs.h: change zio_attribute structure (incompatible) 

This patch removes the union field priv in the zio_attribute and it
introduces the id field. From our experience, the priv.ptr pointer
is useless; the priv.addr field can be used for every purpose, also
if you have your own private structure.

The new field id replaces the role of priv.addr. It can represent a
register address, a register offset, an index of a vector of private
structure which describe how to gain access to a register, or whatever
can describe uniquely a register (or register field)
Signed-off-by: 's avatarFederico Vaga <federico.vaga@gmail.com>
Acked-by: Alessandro Rubini's avatarAlessandro Rubini <rubini@gnudd.com>
parent 32b66aaa
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Showing with 46 additions and 69 deletions
buffers/zio-buf-kmalloc.c
View file @ 7554f819
......@@ -42,7 +42,7 @@ struct zbk_item {
#define to_item(block) container_of(block, struct zbk_item, block);
static ZIO_ATTR_DEFINE_STD(ZIO_BUF, zbk_std_zattr) = {
ZIO_ATTR_REG(zbuf, ZIO_ATTR_ZBUF_MAXLEN, S_IRUGO | S_IWUGO, 0x0, 16),
ZIO_ATTR(zbuf, ZIO_ATTR_ZBUF_MAXLEN, S_IRUGO | S_IWUGO, 0x0, 16),
};
static int zbk_conf_set(struct device *dev, struct zio_attribute *zattr,
......
buffers/zio-buf-vmalloc.c
View file @ 7554f819
......@@ -51,7 +51,7 @@ struct zbk_item {
#define to_item(block) container_of(block, struct zbk_item, block);
static ZIO_ATTR_DEFINE_STD(ZIO_BUF, zbk_std_zattr) = {
ZIO_ATTR_REG(zbuf, ZIO_ATTR_ZBUF_MAXKB, S_IRUGO | S_IWUGO, 0x0, 128),
ZIO_ATTR(zbuf, ZIO_ATTR_ZBUF_MAXKB, S_IRUGO | S_IWUGO, 0x0, 128),
};
static int zbk_conf_set(struct device *dev, struct zio_attribute *zattr,
......
drivers/zio-ad788x.c
View file @ 7554f819
......@@ -56,36 +56,36 @@ struct ad788x {
*/
/* Standard attributes for AD7887*/
static ZIO_ATTR_DEFINE_STD(ZIO_DEV, zattr_dev_ad7887) = {
ZIO_ATTR_REG(zdev, ZIO_ATTR_NBITS, S_IRUGO, 0, 12),
ZIO_ATTR(zdev, ZIO_ATTR_NBITS, S_IRUGO, 0, 12),
/* vref_src can be internal (0) or external (1)*/
ZIO_ATTR_REG(zdev, ZIO_ATTR_VREFTYPE, S_IRUGO | S_IWUGO,
AD7887_VREF_ADDR, 1),
ZIO_ATTR(zdev, ZIO_ATTR_VREFTYPE, S_IRUGO | S_IWUGO,
AD7887_VREF_ADDR, 1),
};
/* Standard attributes for AD7888*/
static ZIO_ATTR_DEFINE_STD(ZIO_DEV, zattr_dev_ad7888) = {
ZIO_ATTR_REG(zdev, ZIO_ATTR_NBITS, S_IRUGO, 0, 12),
ZIO_ATTR(zdev, ZIO_ATTR_NBITS, S_IRUGO, 0, 12),
/* vref_src can be internal (0) or external (1)*/
ZIO_ATTR_REG(zdev, ZIO_ATTR_VREFTYPE, S_IRUGO | S_IWUGO,
AD7888_VREF_ADDR, 0),
ZIO_ATTR(zdev, ZIO_ATTR_VREFTYPE, S_IRUGO | S_IWUGO,
AD7888_VREF_ADDR, 0),
};
/* Extended attributes for AD7887 */
static struct zio_attribute zattr_dev_ext_ad7887[] = {
ZIO_ATTR_EXT_REG(AD788x_PM_NAME, S_IRUGO | S_IWUGO,
AD788x_PM_ADDR, 0x0),
ZIO_ATTR_EXT(AD788x_PM_NAME, S_IRUGO | S_IWUGO,
AD788x_PM_ADDR, 0x0),
/* 0 single channel, 1 dual channel*/
ZIO_ATTR_EXT_REG(AD7887_DUAL_NAME, S_IRUGO | S_IWUGO,
AD7887_SINDUAL_ADDR, 1),
ZIO_ATTR_EXT(AD7887_DUAL_NAME, S_IRUGO | S_IWUGO,
AD7887_SINDUAL_ADDR, 1),
};
/* Extended attributes for AD7888 */
static struct zio_attribute zattr_dev_ext_ad7888[] = {
ZIO_ATTR_EXT_REG(AD788x_PM_NAME, S_IRUGO | S_IWUGO,
AD788x_PM_ADDR, 0x0),
ZIO_ATTR_EXT(AD788x_PM_NAME, S_IRUGO | S_IWUGO,
AD788x_PM_ADDR, 0x0),
};
static int ad788x_conf_set(struct device *dev, struct zio_attribute *zattr,
uint32_t usr_val)
{
unsigned long mask = zattr->priv.addr;
unsigned long mask = zattr->id;
struct ad788x *ad788x;
ad788x = to_zio_dev(dev)->priv_d;
......
drivers/zio-gpio.c
View file @ 7554f819
......@@ -36,7 +36,7 @@ ZIO_PARAM_TRIGGER(zgp_trigger);
ZIO_PARAM_BUFFER(zgp_buffer);
ZIO_ATTR_DEFINE_STD(ZIO_DEV, zgp_zattr_dev) = {
ZIO_ATTR_REG(zdev, ZIO_ATTR_NBITS, S_IRUGO, 0, 1), /* digital */
ZIO_ATTR(zdev, ZIO_ATTR_NBITS, S_IRUGO, 0, 1), /* digital */
};
/* This outputs a cset, currently made up of one channel only */
......
drivers/zio-zero.c
View file @ 7554f819
......@@ -20,18 +20,18 @@ ZIO_PARAM_BUFFER(zzero_buffer);
ZIO_ATTR_DEFINE_STD(ZIO_DEV, zzero_zattr_cset8) = {
/* 8 bit -> ssize = 1 */
ZIO_ATTR_REG(zdev, ZIO_ATTR_NBITS, S_IRUGO, 0, 8),
ZIO_ATTR(zdev, ZIO_ATTR_NBITS, S_IRUGO, 0, 8),
};
ZIO_ATTR_DEFINE_STD(ZIO_DEV, zzero_zattr_cset32) = {
/* 32 bit -> ssize = 4 */
ZIO_ATTR_REG(zdev, ZIO_ATTR_NBITS, S_IRUGO, 0, 32),
ZIO_ATTR(zdev, ZIO_ATTR_NBITS, S_IRUGO, 0, 32),
};
/* This attribute is the sequence point for input channel number 0 of cset 2 */
enum zzero_ext {
ZZERO_SEQ,
};
static struct zio_attribute zzero_cset1_ext[] = {
ZIO_ATTR_EXT_REG("sequence", S_IRUGO | S_IWUGO, ZZERO_SEQ, 0),
ZIO_ATTR_EXT("sequence", S_IRUGO | S_IWUGO, ZZERO_SEQ, 0),
};
/*
* This generates a sequence of 32-bit little-endian numbers.
......
include/linux/zio-sysfs.h
View file @ 7554f819
......@@ -21,9 +21,9 @@
* @attribute: standard attribute structure used to create a sysfs access
* @flags: to set attribute capabilities
* @index [INTERNAL]: index within a group of attribute (standard or extended)
* @priv.reg: register address to use as is
* @priv.reg_descriptor: a generic pointer used to specify how access to a
* particular register on device. This is defined by driver developer
* @id: something unique to identify the attribute. It can be the register
* address which this attribute refers to. It can be an index of an array
* which contain special information to gain access to a register.
* @value: is the value stored on device
* @show: is equivalent to info_get from zio_operations
* @store: is equivalent to conf_set from zio_operations
......@@ -32,10 +32,7 @@ struct zio_attribute {
struct device_attribute attr;
uint32_t flags;
int index;
union { /* priv is sometimes a pointer and sometimes an hw addr */
void *ptr;
unsigned long addr;
} priv;
unsigned long id;
uint32_t value;
const struct zio_sysfs_operations *s_op;
};
......@@ -97,54 +94,34 @@ extern const char zio_zbuf_attr_names[_ZIO_BUF_ATTR_STD_NUM][ZIO_NAME_LEN];
_name[_##_type##_ATTR_STD_NUM]
/*
* @ZIO_ATTR_REG: define a zio attribute with address register
* @ZIO_ATTR_PRV: define a zio attribute with private register
* @ZIO_ATTR_EXT_REG: define a zio extended attribute with address register
* @ZIO_ATTR_EXT_PRV: define a zio extended attribute with private register
* @ZIO_PARAM_EXT_REG: define a zio attribute parameter with address register
* (not included in ctrl)
* @ZIO_PARAM_EXT_PRV: define a zio attribute parameter with private register
* (not included in ctrl)
* @ZIO_ATTR: define a zio attribute
* @ZIO_ATTR_EXT: define a zio extended attribute
* @ZIO_PARAM_EXT: define a zio attribute parameter (not included in ctrl)
*/
#define ZIO_ATTR_REG(zobj, _type, _mode, _add, _val)[_type] = { \
.attr = { \
.attr = { \
.name = zio_##zobj##_attr_names[_type], \
.mode = _mode \
}, \
}, \
.priv.addr = _add, \
.value = _val, \
.flags = ZIO_ATTR_CONTROL, \
}
#define ZIO_ATTR_PRV(zobj, _type, _mode, _priv, _val)[_type] = { \
#define ZIO_ATTR(zobj, _type, _mode, _add, _val)[_type] = { \
.attr = { \
.attr = { \
.name = zio_##zobj##_attr_names[_type], \
.mode = _mode \
}, \
}, \
.priv.ptr = _priv, \
.id = _add, \
.value = _val, \
.flags = ZIO_ATTR_CONTROL, \
}
#define ZIO_ATTR_EXT_REG(_name, _mode, _add, _val) { \
#define ZIO_ATTR_EXT(_name, _mode, _add, _val) { \
.attr = { .attr = {.name = _name, .mode = _mode},}, \
.priv.addr = _add, \
.id = _add, \
.value = _val, \
.flags = ZIO_ATTR_CONTROL, \
}
#define ZIO_PARAM_EXT_REG(_name, _mode, _add, _val) { \
#define ZIO_PARAM_EXT(_name, _mode, _add, _val) { \
.attr = { .attr = {.name = _name, .mode = _mode},}, \
.priv.addr = _add, \
.id = _add, \
.value = _val, \
.flags = 0, \
}
#define ZIO_ATTR_EXT_PRV(_name, _mode, _priv, _val) { \
.attr = { .attr = {.name = _name, .mode = _mode},}, \
.priv.ptr = _priv, \
.value = _val, \
.flags = ZIO_ATTR_CONTROL, \
}
#endif /* ZIO_SYSFS_H_ */
triggers/zio-trig-irq.c
View file @ 7554f819
......@@ -29,13 +29,13 @@ enum zti_attrs {
};
static ZIO_ATTR_DEFINE_STD(ZIO_TRG, zti_std_attr) = {
ZIO_ATTR_REG(trig, ZIO_ATTR_TRIG_POST_SAMP, S_IRUGO | S_IWUGO,
ZTI_ATTR_NSAMPLES, 16),
ZIO_ATTR(trig, ZIO_ATTR_TRIG_POST_SAMP, S_IRUGO | S_IWUGO,
ZTI_ATTR_NSAMPLES, 16),
};
static struct zio_attribute zti_ext_attr[] = {
ZIO_ATTR_EXT_REG("irq", S_IRUGO, ZTI_ATTR_IRQ, -1),
ZIO_ATTR_EXT_REG("gpio", S_IRUGO, ZTI_ATTR_GPIO, -1),
ZIO_ATTR_EXT("irq", S_IRUGO, ZTI_ATTR_IRQ, -1),
ZIO_ATTR_EXT("gpio", S_IRUGO, ZTI_ATTR_GPIO, -1),
};
static int zti_conf_set(struct device *dev, struct zio_attribute *zattr,
uint32_t usr_val)
......
triggers/zio-trig-timer.c
View file @ 7554f819
......@@ -33,13 +33,13 @@ enum ztt_attrs { /* names for the "addr" value of sw parameters */
};
static ZIO_ATTR_DEFINE_STD(ZIO_TRG, ztt_std_attr) = {
ZIO_ATTR_REG(trig, ZIO_ATTR_TRIG_POST_SAMP, S_IRUGO | S_IWUGO,
ZTT_ATTR_NSAMPLES, 16),
ZIO_ATTR(trig, ZIO_ATTR_TRIG_POST_SAMP, S_IRUGO | S_IWUGO,
ZTT_ATTR_NSAMPLES, 16),
};
static struct zio_attribute ztt_ext_attr[] = {
ZIO_ATTR_EXT_REG("ms-period", S_IRUGO | S_IWUGO,
ZTT_ATTR_PERIOD, 2000),
ZIO_ATTR_EXT("ms-period", S_IRUGO | S_IWUGO,
ZTT_ATTR_PERIOD, 2000),
};
static int ztt_conf_set(struct device *dev, struct zio_attribute *zattr,
uint32_t usr_val)
......@@ -48,7 +48,7 @@ static int ztt_conf_set(struct device *dev, struct zio_attribute *zattr,
struct ztt_instance *ztt;
pr_debug("%s:%d\n", __func__, __LINE__);
switch (zattr->priv.addr) {
switch (zattr->id) {
case ZTT_ATTR_PERIOD:
ztt = to_ztt_instance(ti);
ztt->period = msecs_to_jiffies(usr_val);
......@@ -58,7 +58,7 @@ static int ztt_conf_set(struct device *dev, struct zio_attribute *zattr,
break;
default:
pr_err("%s: unknown \"addr\" 0x%lx for configuration\n",
__func__, zattr->priv.addr);
__func__, zattr->id);
return -EINVAL;
}
return 0;
......
triggers/zio-trig-user.c
View file @ 7554f819
......@@ -20,8 +20,8 @@
#define ZTU_DEFAULT_BLOCK_SIZE 16
static ZIO_ATTR_DEFINE_STD(ZIO_TRG, ztu_std_attr) = {
ZIO_ATTR_REG(trig, ZIO_ATTR_TRIG_POST_SAMP, S_IRUGO | S_IWUGO,
0 /* no addr needed */, ZTU_DEFAULT_BLOCK_SIZE),
ZIO_ATTR(trig, ZIO_ATTR_TRIG_POST_SAMP, S_IRUGO | S_IWUGO,
0 /* no addr needed */, ZTU_DEFAULT_BLOCK_SIZE),
};
int ztu_conf_set(struct device *dev, struct zio_attribute *zattr,
......
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