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# Project description
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The aim of the board is to improve the jitter performance of the 10 MHz
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and PPS outputs of WR Switch using an external PLL and a new VCTCXO.
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The board needs to be mounted inside an existing WR-S3/18 switch, on top
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of the Switch Control Board (SCB) and will use the installed 12V power
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supply of the WRS. It needs a new external 10 MHz input, to be used
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instead of the current 10 MHz input when configured as Grand Master. The
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improvements are also effective when configured as boundary switch,
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thanks to the new VCTCXO.
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The proposed board can be installed in any PCB v3.3 and v3.4 versions of
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the switch.
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The following steps are required to install the board inside the switch:
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- Soldering of the SMI link connector
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- Removing of the VM53S3 oscillator on the SCB and installation of an
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U.FL connector
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## Specifications
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<table>
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<tbody>
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<tr class="odd">
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<td><strong>Parameter</strong></td>
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<td><strong>Value</strong></td>
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</tr>
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</tbody>
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</table>
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-----
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## Project Information
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- Hardware: see EDMS (CERN Electronic Document Management System)
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document [EDA-xxxxx.](https://edms.cern.ch/nav/EDA-xxxxx)
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- [Frequently Asked Questions](FAQ)
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-----
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## Contacts
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### Commercial producers
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### General question about project
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- [Mattia Rizzi](mailto:Mattia.Rizzi@cern.ch) - CERN
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- [Erik van der Bij](mailto:Erik.van.der.Bij@cern.ch) - CERN
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-----
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## Status
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<table>
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<tbody>
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<tr class="odd">
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<td><strong>Date</strong></td>
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<td><b> Event </b></td>
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</tr>
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<tr class="even">
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<td>23-10-2016</td>
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<td>Schematics ready.</td>
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</tr>
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</tbody>
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</table>
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-----
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Mattia Rizzi - 7 November 2016
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### Files
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* [rsz_3d_image__1_.jpg](/uploads/5948ffb2ef9835abdc2008567860af2d/rsz_3d_image__1_.jpg) |
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