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Tomasz Wlostowski authored
rt_cpu: disable PLL verbose mode by default (output on UART is blocking and greatly slows down LDPC port calibration in the WR Switch)
3e4f8d1e
rt_cpu: disable PLL verbose mode by default (output on UART is blocking and greatly slows down LDPC port calibration in the WR Switch)
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devel_build_test_defconfig | Loading commit data... | |
gsi_defconfig | Loading commit data... | |
gsi_pdelay_defconfig | Loading commit data... | |
host_process_config | Loading commit data... | |
spec_defconfig | Loading commit data... | |
spec_pdelay_defconfig | Loading commit data... | |
wr_switch_defconfig | Loading commit data... | |
wrnic_defconfig | Loading commit data... | |
wrpc_sim_defconfig | Loading commit data... |