Etherbone won't fit with a full ppsi in the default RAM size for SPEC
cards. So this commit uses a ppsi hack to avoid internal ptpdump,
activating it when CONFIG_RAMSIZE is not 128kB and CONFIG_ETHERBONE is
set.

We should rather compare RAMSIZE with "< 131072", but neither gnu make
nor this version of Kconfig support numeric comparison.

This hack will soon disappera, as ppsi is gaining Kconfig support, so
wrpc-sw will be able to pass proper configuration. Also, 128kB will soon
be the default for SPEC images.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Previous one was not working when:
* tR and tF were both inside (0; 4000) and tR < tF
* tR and tF were both inside (4000; 8000) and tF < tR

in those cases it was calculating ttrans around falling edge instead of rising
edge. This commit fixes it.

After subtraction of transition value from linearized phase, the phase value was renormalized to 0...clock_period-1, but
not the other counters. This resulted in very rare 8ns jumps.

The phase was used backwards. Somehow this cancelled out the systematic
error introduced by the actual bug (wrong phase offset). When both bugs
are fixed the code seems to work every time.

t24p calibration finds the rising&falling edges in
dev/rxts_calibrator.c:rxts_calibration_update.  It then computes the
"transition" as (falling+rising)/2.  That is, ttrans points 25% past the
dangerous transition.  Now that value arrives in one of the three copies of
ptpd_netif_linearize_rx_timestamp (depending on build).  In this method
ttrans has +-1/4 period added to it to compute trip_lo and trip_hi.  The
intent as described by the comment (and common sense) is to avoid the rising
edge when the phase is within +-1/4 period.  Unfortunately, this code
assumes that ttrans IS the rising edge, when in fact it is the rising
edge+25%. Thus, the code ACTUALLY tests phase within 0-50%.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

This fixes the previous commit, which prevented to build wrpc-sw with
CONFIG_PTP_NOPOSIX (silly me).
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Tom's fix for helper PLL, in Slave mode it should use RX clock instead of REF clock.

Tom's fix for WR Switch makes ptracker much faster so that SPLL can handle all 18 ports.

Greg's commit to fix the t24p calibration broke that calibration
for devices using sdbfs. The EEPROM write method clobbered the
phase transition value.

These headers shadow system headers.
While they are necessary for building on the LM32, it breaks any
code that wants the other WR headers on a different architecture.

By moving these headers, we can pick whether to use them or not.

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

This is a bigger change than expected, as the width was defined
in two places. So I moved the definition in <wrc.h>, whence everybody
picks it.
Signed-off-by: Alessandro Rubini <rubini@gnudd.com>