bugfix: w1: initialize clock divisor (thanks Cesar)

Cesar Prados noted that if you boot w1 directly, not passing through sockitowm, w1 was not working. I always run sockitowm because I have it in the lm32 code that starts every time I load the fpga. This fixes the missing clock divisor. Signed-off-by: Alessandro Rubini <rubini@gnudd.com>

bugfix: w1: initialize clock divisor (thanks Cesar)
Cesar Prados noted that if you boot w1 directly, not passing through sockitowm, w1 was not working. I always run sockitowm because I have it in the lm32 code that starts every time I load the fpga. This fixes the missing clock divisor. Signed-off-by: Alessandro Rubini <rubini@gnudd.com>
fef22531 · Alessandro Rubini · d44ace7e · fef22531 · fef22531 · fef22531
Commit fef22531 authored May 14, 2013 by Alessandro Rubini
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w1-hw.c dev/w1-hw.c +11 -0

w1.h include/w1.h +1 -0

wrc_main.c wrc_main.c +1 -0

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--- a/dev/w1-hw.c
+++ b/dev/w1-hw.c
@@ -62,3 +62,14 @@ struct w1_ops wrpc_w1_ops = {
 };

 struct w1_bus wrpc_w1_bus;
+
+/* Init from sockitowm code */
+#define CLK_DIV_NOR (CPU_CLOCK / 200000 - 1)	/* normal mode */
+#define CLK_DIV_OVD (CPU_CLOCK / 1000000 - 1)	/* overdrive mode (not used) */
+void wrpc_w1_init(void)
+{
+	IOWR_SOCKIT_OWM_CDR(BASE_ONEWIRE,
+			    ((CLK_DIV_NOR & SOCKIT_OWM_CDR_N_MSK) |
+			     ((CLK_DIV_OVD << SOCKIT_OWM_CDR_O_OFST) &
+			      SOCKIT_OWM_CDR_O_MSK)));
+}
--- a/include/w1.h
+++ b/include/w1.h
@@ -82,5 +82,6 @@ extern int w1_write_eeprom_bus(struct w1_bus *bus,

 extern struct w1_ops wrpc_w1_ops;
 extern struct w1_bus wrpc_w1_bus;
+extern void wrpc_w1_init(void);

 #endif /* __BATHOS_W1_H__ */
--- a/wrc_main.c
+++ b/wrc_main.c
@@ -58,6 +58,7 @@ static void wrc_initialize()
 	owInit();
 	own_scanbus(ONEWIRE_PORT);
 #else /* CONFIG_W1 */
+	wrpc_w1_init();
 	wrpc_w1_bus.detail = ONEWIRE_PORT;
 	w1_scan_bus(&wrpc_w1_bus);
 #endif