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Software for White Rabbit PTP Core
Commits
c0d3ef64
Commit
c0d3ef64
authored
Apr 07, 2021
by
Tomasz Wlostowski
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shell: add softpll VCO freeze/ptracker freeze commands
parent
23eada53
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5 changed files
with
46 additions
and
10 deletions
+46
-10
cmd_ptrack.c
shell/cmd_ptrack.c
+22
-7
shell.c
shell/shell.c
+1
-0
softpll_ng.c
softpll/softpll_ng.c
+10
-0
spll_main.c
softpll/spll_main.c
+12
-3
spll_main.h
softpll/spll_main.h
+1
-0
No files found.
shell/cmd_ptrack.c
View file @
c0d3ef64
...
...
@@ -22,15 +22,30 @@ extern int wrc_phase_tracking;
static
int
cmd_ptrack
(
const
char
*
args
[])
{
if
(
args
[
0
]
&&
!
strcasecmp
(
args
[
0
],
"enable"
))
{
wr_servo_enable_tracking
(
1
);
wrc_phase_tracking
=
1
;
pp_printf
(
"UnFreezing SPLL phase shifter
\n
"
);
spll_vco_freeze
(
0
);
spll_pshifter_freeze
(
0
);
}
else
if
(
args
[
0
]
&&
!
strcasecmp
(
args
[
0
],
"disable"
))
{
wr_servo_enable_tracking
(
0
);
wrc_phase_tracking
=
0
;
else
if
(
args
[
0
]
&&
!
strcasecmp
(
args
[
0
],
"ps-freeze"
))
{
if
(
args
[
1
]
)
{
pp_printf
(
"Freezing SPLL phase shifter at phase %d ps
\n
"
,
atoi
(
args
[
1
]));
spll_set_phase_shift
(
0
,
atoi
(
args
[
1
])
);
spll_pshifter_freeze
(
1
);
}
else
{
pp_printf
(
"Freezing SPLL phase shifter"
);
spll_pshifter_freeze
(
1
);
}
}
pp_printf
(
"phase tracking %s
\n
"
,
wrc_phase_tracking
?
"ON"
:
"OFF"
);
else
if
(
args
[
0
]
&&
!
strcasecmp
(
args
[
0
],
"vco-freeze"
))
{
pp_printf
(
"Freezing SPLL VCO control"
);
spll_vco_freeze
(
1
);
}
return
0
;
}
...
...
shell/shell.c
View file @
c0d3ef64
...
...
@@ -365,6 +365,7 @@ void shell_register_commands(void)
REGISTER_WRC_COMMAND
(
sfp
);
REGISTER_WRC_COMMAND
(
stat
);
REGISTER_WRC_COMMAND
(
sensors
);
REGISTER_WRC_COMMAND
(
ptrack
);
if
(
HAS_IP
)
REGISTER_WRC_COMMAND
(
ip
);
}
...
...
softpll/softpll_ng.c
View file @
c0d3ef64
...
...
@@ -888,3 +888,13 @@ void spll_set_aux_mode( int channel, int mode )
{
softpll
.
aux
[
channel
].
mode
=
mode
;
}
int
spll_pshifter_freeze
(
int
freeze
)
{
softpll
.
mpll
.
ps_freeze
=
freeze
;
}
int
spll_vco_freeze
(
int
freeze
)
{
softpll
.
mpll
.
vco_freeze
=
freeze
;
}
softpll/spll_main.c
View file @
c0d3ef64
...
...
@@ -26,6 +26,9 @@ void mpll_init(struct spll_main_state *s, int id_ref,
int
id_out
)
{
/* Frequency branch PI controller */
s
->
ps_freeze
=
0
;
s
->
vco_freeze
=
0
;
s
->
pi
.
y_min
=
5
;
s
->
pi
.
y_max
=
65530
;
s
->
pi
.
anti_windup
=
1
;
...
...
@@ -118,6 +121,9 @@ void mpll_start(struct spll_main_state *s)
{
pll_verbose
(
"MPLL_Start [dac %d]
\n
"
,
s
->
dac_index
);
s
->
ps_freeze
=
0
;
s
->
vco_freeze
=
0
;
s
->
adder_ref
=
s
->
adder_out
=
0
;
s
->
tag_ref
=
-
1
;
s
->
tag_out
=
-
1
;
...
...
@@ -208,8 +214,11 @@ int mpll_update(struct spll_main_state *s, int tag, int source)
#endif
y
=
pi_update
((
spll_pi_t
*
)
&
s
->
pi
,
err
);
SPLL
->
DAC_MAIN
=
SPLL_DAC_MAIN_VALUE_W
(
y
)
|
SPLL_DAC_MAIN_DAC_SEL_W
(
s
->
dac_index
);
if
(
!
s
->
vco_freeze
)
{
SPLL
->
DAC_MAIN
=
SPLL_DAC_MAIN_VALUE_W
(
y
)
|
SPLL_DAC_MAIN_DAC_SEL_W
(
s
->
dac_index
);
}
if
(
s
->
dac_index
==
0
)
spll_log_dac
(
y
);
...
...
@@ -228,7 +237,7 @@ int mpll_update(struct spll_main_state *s, int tag, int source)
s
->
adder_out
-=
MPLL_TAG_WRAPAROUND
;
}
if
(
s
->
locked
)
{
if
(
s
->
locked
&&
!
s
->
ps_freeze
)
{
if
(
s
->
phase_shift_current
<
s
->
phase_shift_target
)
{
s
->
phase_shift_current
++
;
#if defined(CONFIG_WR_SWITCH)
...
...
softpll/spll_main.h
View file @
c0d3ef64
...
...
@@ -30,6 +30,7 @@ struct spll_main_state {
int
sample_n
;
int
dac_index
;
int
enabled
;
int
ps_freeze
,
vco_freeze
;
};
void
mpll_init
(
struct
spll_main_state
*
s
,
int
id_ref
,
...
...
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