Skip to content
Projects
Groups
Snippets
Help
Loading...
Sign in
Toggle navigation
S
Software for White Rabbit PTP Core
Project
Project
Details
Activity
Cycle Analytics
Repository
Repository
Files
Commits
Branches
Tags
Contributors
Graph
Compare
Charts
Issues
32
Issues
32
List
Board
Labels
Milestones
Merge Requests
5
Merge Requests
5
CI / CD
CI / CD
Pipelines
Schedules
Wiki
Wiki
image/svg+xml
Discourse
Discourse
Members
Members
Collapse sidebar
Close sidebar
Activity
Graph
Charts
Create a new issue
Commits
Issue Boards
Open sidebar
Projects
Software for White Rabbit PTP Core
Commits
b7682436
Commit
b7682436
authored
Jan 09, 2024
by
Peter Jansweijer
Browse files
Options
Browse Files
Download
Email Patches
Plain Diff
optimize ocxo gain stage parameters; fast 1st stage
parent
5c71272b
Pipeline
#5130
passed with stage
in 3 minutes and 58 seconds
Changes
1
Pipelines
2
Hide whitespace changes
Inline
Side-by-side
Showing
1 changed file
with
2 additions
and
2 deletions
+2
-2
board.c
boards/spec7/board.c
+2
-2
No files found.
boards/spec7/board.c
View file @
b7682436
...
...
@@ -83,14 +83,14 @@ timeout_t pll_sync_timeout;
static
void
spec7_spll_setup
(
void
)
{
int
implement_two_stages
=
0
;
// implement 2-stage ocxo lock later
int
implement_two_stages
=
1
;
// implement 2-stage ocxo lock later
/* configure a suitable PI gain schedule for the SoftPLL: */
spll_gain_schedule_t
*
gs
=
&
spll_main_ocxo_gain_sched
;
/* we start with the default values (Bandwidth 100 Hz) */
gs
->
stages
[
0
].
kp
=
-
4000
;
gs
->
stages
[
0
].
ki
=
-
8
;
gs
->
stages
[
0
].
ki
=
-
100
;
gs
->
stages
[
0
].
lock_samples
=
10000
;
gs
->
stages
[
0
].
shift
=
12
;
...
...
Write
Preview
Markdown
is supported
0%
Try again
or
attach a new file
Attach a file
Cancel
You are about to add
0
people
to the discussion. Proceed with caution.
Finish editing this message first!
Cancel
Please
register
or
sign in
to comment