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Software for White Rabbit PTP Core
Commits
7b699144
Commit
7b699144
authored
May 04, 2023
by
Tristan Gingold
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Plain Diff
boards: factorize memory map to board.h
parent
b9cac100
Pipeline
#4493
failed with stage
in 2 minutes and 38 seconds
Changes
8
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1
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8 changed files
with
46 additions
and
73 deletions
+46
-73
board.c
boards/afcz/board.c
+3
-2
board.h
boards/afcz/board.h
+9
-15
board.c
boards/ertm14/board.c
+1
-1
board.h
boards/ertm14/board.h
+10
-22
board.h
boards/sis8300ku/board.h
+5
-13
board.h
boards/wr-switch/board.h
+6
-0
board.h
boards/wr2rf-vme/board.h
+0
-20
board.h
include/board.h
+12
-0
No files found.
boards/afcz/board.c
View file @
7b699144
#include "board.h"
/* We need the common board.h */
#include "../../include/board.h"
#include "wrc-debug.h"
#include "dev/syscon.h"
...
...
@@ -755,7 +756,7 @@ int wrc_board_early_init()
idt8v_commit_configuration
(
&
board
.
clk_mux
);
#endif
wb_cm_init
(
&
board
.
clk_mon
,
BASE_CLOCK_MONITOR
,
6
);
wb_cm_init
(
&
board
.
clk_mon
,
BASE_
AFCZ_
CLOCK_MONITOR
,
6
);
#if defined(CONFIG_TARGET_AFCZ_V1)
sfp_setup
();
...
...
boards/afcz/board.h
View file @
7b699144
...
...
@@ -12,21 +12,15 @@
#define BOARD_HAS_CUSTOM_NETWORK_INIT 1
/* Fixed base addresses */
#define BASE_UART 0x20500
#define BASE_SYSCON 0x20400
#define BASE_WR_ENDPOINT_MAIN 0x20100
#define BASE_MINIC 0x20000
#define BASE_ONEWIRE 0x20600
#define BASE_SOFTPLL 0x20200
#define BASE_PPS_GEN 0x20300
#define BASE_WDIAGS_PRIV 0x20900
#define BASE_AUXWB 0x28000
#define BASE_SI57X_INTERFACE (BASE_AUXWB + 0x80)
#define BASE_CLOCK_MONITOR (BASE_AUXWB + 0xc0)
#define BASE_WR_ENDPOINT_BTRAIN (BASE_AUXWB + 0x00)
/* Unusual base addresses */
#undef DEV_BASE
#define DEV_BASE 0x20000
#define BASE_WR_ENDPOINT_MAIN BASE_EP
#define BASE_SI57X_INTERFACE (BASE_AUXWB + 0x80)
#define BASE_AFCZ_CLOCK_MONITOR (BASE_AUXWB + 0xc0)
#define BASE_WR_ENDPOINT_BTRAIN (BASE_AUXWB + 0x00)
#define AFCZ_CM_CHANNEL_CLK_PCB 0
#define AFCZ_CM_CHANNEL_CLK_SYS 3
...
...
boards/ertm14/board.c
View file @
7b699144
...
...
@@ -1407,7 +1407,7 @@ static int ertm_process_psnmp(struct uart_packet *rx_pkt, struct uart_packet *tx
static
void
ertm14_clock_monitor_init
(
void
)
{
wb_cm_init
(
&
board
.
ertm14_cmon
,
BASE_CLOCK_MONITOR
,
5
);
wb_cm_init
(
&
board
.
ertm14_cmon
,
BASE_
ERTM_
CLOCK_MONITOR
,
5
);
wb_cm_set_ref_frequency
(
&
board
.
ertm14_cmon
,
DMTD_CLOCK_FREQ_HZ
);
/* use the DDMTD clock as the reference frequency (we don't care much about accuracy here)
...
...
boards/ertm14/board.h
View file @
7b699144
...
...
@@ -80,32 +80,20 @@ int board_update(void);
#define ERTM14_MAX_CONFIGS 8
extern
unsigned
char
*
BASE_MINIC
;
extern
unsigned
char
*
BASE_EP
;
#define FMC_EEPROM_ADR 0x50
#define SDBFS_REC 5
#define BASE_AUXWB (DEV_BASE + 0x08000)
#define BASE_SOFTPLL (DEV_BASE + 0x00200)
#define BASE_PPS_GEN (DEV_BASE + 0x00300)
#define BASE_UART (DEV_BASE + 0x00500)
#define BASE_SYSCON (DEV_BASE + 0x00400)
#define BASE_EP (DEV_BASE + 0x00100)
#define BASE_MINIC (DEV_BASE + 0x00000)
#define BASE_ONEWIRE (DEV_BASE + 0x00600)
#define BASE_MMC_UART_14 (BASE_AUXWB + 0x200)
#define BASE_MMC_UART_15 (BASE_AUXWB + 0x700)
#define BASE_ERTM14_DDS_SYNC_UNIT (BASE_AUXWB + 0x300)
#define BASE_CLOCK_MONITOR (BASE_AUXWB + 0x100)
#define BASE_ERTM14_10MHZ_ALIGN_UNIT (BASE_AUXWB + 0x400)
#define BASE_ERTM14_RF_FRAME_TRANSCEIVER (BASE_AUXWB + 0x500)
#define BASE_ERTM14_STREAMERS (BASE_AUXWB + 0x600)
#define BASE_ERTM14_DEBUG_UART (BASE_AUXWB + 0x800)
#define BASE_ERTM14_BUILD_INFO (BASE_AUXWB + 0x900)
#define BASE_ERTM14_DNA (BASE_AUXWB + 0x1000)
#define BASE_ERTM_CLOCK_MONITOR (BASE_AUXWB + 0x100)
#define BASE_MMC_UART_14 (BASE_AUXWB + 0x200)
#define BASE_ERTM14_DDS_SYNC_UNIT (BASE_AUXWB + 0x300)
#define BASE_ERTM14_10MHZ_ALIGN_UNIT (BASE_AUXWB + 0x400)
#define BASE_ERTM14_RF_FRAME_TRANSCEIVER (BASE_AUXWB + 0x500)
#define BASE_ERTM14_STREAMERS (BASE_AUXWB + 0x600)
#define BASE_MMC_UART_15 (BASE_AUXWB + 0x700)
#define BASE_ERTM14_DEBUG_UART (BASE_AUXWB + 0x800)
#define BASE_ERTM14_BUILD_INFO (BASE_AUXWB + 0x900)
#define BASE_ERTM14_DNA (BASE_AUXWB + 0x1000)
#define ERTM14_RF_OUT_MIN_ID ERTM_COMMON_RF_OUT_MIN_ID
#define ERTM14_RF_OUT_MAX_ID ERTM_COMMON_RF_OUT_MAX_ID
...
...
boards/sis8300ku/board.h
View file @
7b699144
...
...
@@ -13,19 +13,11 @@
#define BOARD_USE_CUSTOM_SDBFS 1
#define BOARD_HAS_CUSTOM_NETWORK_INIT 1
/* Fixed base addresses */
#define BASE_MINIC 0x20000
#define BASE_EP 0x20100
#define BASE_SOFTPLL 0x20200
#define BASE_PPS_GEN 0x20300
#define BASE_SYSCON 0x20400
#define BASE_UART 0x20500
#define BASE_ONEWIRE 0x20600
#define BASE_WDIAGS_PRIV 0x20900
#define BASE_GPIO 0x28080
//#define BASE_ETHERNOBE_CFG 0x20700
/* Unusual base addresses */
#undef DEV_BASE
#define DEV_BASE 0x20000
#define BASE_GPIO (BASE_AUXWB + 0x080)
/* Board-specific parameters */
#define TICS_PER_SECOND 1000
...
...
boards/wr-switch/board.h
View file @
7b699144
...
...
@@ -13,6 +13,12 @@
#define NS_PER_CLOCK 16
#define REF_CLOCK_PERIOD_PS 16000
#undef DEV_BASE
#undef BASE_MINIC
#undef BASE_SOFTPLL
#undef BASE_PPS_GEN
#undef BASE_UART
/* RT CPU Memory layout */
#define BASE_UART 0x10000
#define BASE_SOFTPLL 0x10100
...
...
boards/wr2rf-vme/board.h
View file @
7b699144
...
...
@@ -63,24 +63,4 @@ int board_update(void);
#define SDBFS_REC 5
#ifdef CONFIG_ARCH_RISCV
#define DEV_BASE 0x100000
#elif defined CONFIG_ARCH_LM32
#define DEV_BASE 0x40000
#else
#error (Wrong Arch!)
#endif
/* Fixed base addresses */
#define BASE_MINIC (DEV_BASE + 0x000)
#define BASE_EP (DEV_BASE + 0x100)
#define BASE_SOFTPLL (DEV_BASE + 0x200)
#define BASE_PPS_GEN (DEV_BASE + 0x300)
#define BASE_SYSCON (DEV_BASE + 0x400)
#define BASE_UART (DEV_BASE + 0x500)
#define BASE_ONEWIRE (DEV_BASE + 0x600)
#define BASE_WDIAGS_PRIV (DEV_BASE + 0x900)
#define BASE_CLOCK_MONITOR (DEV_BASE + 0xa00)
#define BASE_AUXWB (DEV_BASE + 0x8000)
#endif
/* __BOARD_WRC_H */
include/board.h
View file @
7b699144
...
...
@@ -22,6 +22,18 @@
#error Wrong CPU architecture. Must define either LM32 or RISC-V.
#endif
/* Fixed base addresses */
#define BASE_MINIC (DEV_BASE + 0x000)
#define BASE_EP (DEV_BASE + 0x100)
#define BASE_SOFTPLL (DEV_BASE + 0x200)
#define BASE_PPS_GEN (DEV_BASE + 0x300)
#define BASE_SYSCON (DEV_BASE + 0x400)
#define BASE_UART (DEV_BASE + 0x500)
#define BASE_ONEWIRE (DEV_BASE + 0x600)
#define BASE_WDIAGS_PRIV (DEV_BASE + 0x900)
#define BASE_CLOCK_MONITOR (DEV_BASE + 0xa00)
#define BASE_AUXWB (DEV_BASE + 0x8000)
#if defined(CONFIG_TARGET_GENERIC_PHY_8BIT) || defined(CONFIG_TARGET_GENERIC_PHY_16BIT) || defined(CONFIG_TARGET_SPEC_SILABS)
# include "boards/generic/board.h"
#elif defined(CONFIG_TARGET_WR_SWITCH)
...
...
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